公开(公告)号：US20240055390A1

公开(公告)日：2024-02-15

申请号：US18491813

申请日：2023-10-23

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Yi-Jen Lo ,  Hsih Yang Chiu ,  Ching Hung Chang ,  Chiang-Lin Shih

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/80 ,  H01L25/50 ,  H01L25/0657 ,  H01L24/08 ,  H01L2924/1436 ,  H01L2224/80894 ,  H01L2224/08146 ,  H01L2225/06541 ,  H01L2224/8038

摘要： The disclosure provides a method of manufacturing a semiconductor device including bonding a second device wafer to a first device wafer, such that a first bonding interface including a dielectric-to-dielectric bonding interface and a metal-to-metal bonding interface is formed between the first device wafer and the second device wafer, wherein the second device wafer is electrically coupled to the first device wafer, and a function of the first device wafer and the second device wafer are the same kind of device wafer. A semiconductor device is also provided.

公开(公告)号：US11901350B2

公开(公告)日：2024-02-13

申请号：US17563346

申请日：2021-12-28

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao Huang

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L25/50 ,  H01L23/49827 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/15311

摘要： The present application discloses a method for fabricating a semiconductor device including providing a first stacking structure comprising a first controller die, and a plurality of first storage dies sequentially stacked on the first controller die; providing a second stacking structure comprising a second controller die, and a plurality of second storage dies sequentially stacked on the second controller die; bonding the first controller die onto a bottom die through a plurality of first interconnect units; and bonding the second controller die onto the bottom die through a plurality of second interconnect units. The plurality of first storage dies respectively comprise a plurality of first storage units configured as a floating array. The plurality of second storage dies comprise a plurality of second storage units respectively comprising an insulator-conductor-insulator structure.

公开(公告)号：US11901344B2

公开(公告)日：2024-02-13

申请号：US17506706

申请日：2021-10-21

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Shing-Yih Shih

IPC分类号： H01L23/49 ,  H01L25/10 ,  H01L23/48 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/538

CPC分类号： H01L25/105 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/50 ,  H01L23/5384 ,  H01L2225/06541

摘要： A manufacturing method of a semiconductor package is provided as follows. A semiconductor die is provided, wherein the semiconductor die comprises a semiconductor substrate, an interconnection layer and a through semiconductor via, the interconnection layer is disposed on an active surface of the semiconductor substrate, the through semiconductor via penetrates the semiconductor substrate from a back surface of the semiconductor substrate to the active surface of the semiconductor substrate. An encapsulant is provided to laterally encapsulate the semiconductor die. A through encapsulant via penetrating through the encapsulant is formed.

公开(公告)号：US20240049452A1

公开(公告)日：2024-02-08

申请号：US18204548

申请日：2023-06-01

申请人： NANYA TECHNOLOGY CORPORATION

发明人： YU-TING LIN

IPC分类号： H10B12/00

CPC分类号： H10B12/34 ,  H10B12/053

摘要： A method of manufacturing a semiconductor structure and a semiconductor structure are provided. The method includes: providing a sacrificial structure disposed on a substrate; arranging a photomask to cover the sacrificial structure, wherein the photomask includes a plurality of transparent portions, a plurality of central opaque portions, at least one first edge opaque portion and at least one second edge opaque portion between the first edge opaque portion and the central opaque portions; removing portions of the sacrificial structure to form a plurality of central openings, at least one first edge opening and at least one second edge opening through the central opaque portions, the first edge opaque portion, the second edge opaque portion and the transparent portions; and forming at least one edge word line on the substrate through the second edge opening and forming a plurality of central word lines on the substrate through the central openings.

公开(公告)号：US20240049451A1

公开(公告)日：2024-02-08

申请号：US17879971

申请日：2022-08-03

申请人： NANYA TECHNOLOGY CORPORATION

发明人： YU-TING LIN

IPC分类号： H01L27/108

CPC分类号： H01L27/10823 ,  H01L27/10876

摘要： A method of manufacturing a semiconductor structure and a semiconductor structure are provided. The method includes: providing a sacrificial structure disposed on a substrate; arranging a photomask to cover the sacrificial structure, wherein the photomask includes a plurality of transparent portions, a plurality of central opaque portions, at least one first edge opaque portion and at least one second edge opaque portion between the first edge opaque portion and the central opaque portions; removing portions of the sacrificial structure to form a plurality of central openings, at least one first edge opening and at least one second edge opening through the central opaque portions, the first edge opaque portion, the second edge opaque portion and the transparent portions; and forming at least one edge word line on the substrate through the second edge opening and forming a plurality of central word lines on the substrate through the central openings.

公开(公告)号：US20240047448A1

公开(公告)日：2024-02-08

申请号：US18381297

申请日：2023-10-18

申请人： NANYA TECHNOLOGY CORPORATION

发明人： TSE-YAO HUANG

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/532 ,  H01L21/768 ,  H01L25/00

CPC分类号： H01L25/18 ,  H01L24/08 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L21/76841 ,  H01L25/50 ,  H01L24/80 ,  H01L2224/80896 ,  H01L2224/08145 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/80895

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first chip including: a first inter-dielectric layer positioned on a first substrate; a plug structure positioned in the first inter-dielectric layer and electrically coupled to a functional unit of the first chip; a first redistribution layer positioned on the first inter-dielectric layer and distant from the plug structure; a first lower bonding pad positioned on the first redistribution layer; and a second lower bonding pad positioned on the plug structure; and a second chip positioned on the first chip and including: a first upper bonding pad positioned on the first lower bonding pad; a second upper bonding pad positioned on the second lower bonding pad; and a plurality of storage units electrically coupled to the first upper bonding pad and the second upper bonding pad.

公开(公告)号：US20240047447A1

公开(公告)日：2024-02-08

申请号：US18378892

申请日：2023-10-11

申请人： NANYA TECHNOLOGY CORPORATION

发明人： TSE-YAO HUANG

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/532 ,  H01L21/768 ,  H01L25/00

CPC分类号： H01L25/18 ,  H01L24/08 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L21/76841 ,  H01L25/50 ,  H01L24/80 ,  H01L2224/80896 ,  H01L2224/08145 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/80895

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first chip including: a first inter-dielectric layer positioned on a first substrate; a plug structure positioned in the first inter-dielectric layer and electrically coupled to a functional unit of the first chip; a first redistribution layer positioned on the first inter-dielectric layer and distant from the plug structure; a first lower bonding pad positioned on the first redistribution layer; and a second lower bonding pad positioned on the plug structure; and a second chip positioned on the first chip and including: a first upper bonding pad positioned on the first lower bonding pad; a second upper bonding pad positioned on the second lower bonding pad; and a plurality of storage units electrically coupled to the first upper bonding pad and the second upper bonding pad.

公开(公告)号：US20240047400A1

公开(公告)日：2024-02-08

申请号：US18381895

申请日：2023-10-19

申请人： NANYA TECHNOLOGY CORPORATION

发明人： CHUN-CHENG LIAO

IPC分类号： H01L23/00 ,  H01L23/31

CPC分类号： H01L24/16 ,  H01L24/13 ,  H01L24/05 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/11011 ,  H01L2224/16147 ,  H01L2224/13582 ,  H01L2224/13006 ,  H01L2224/02235 ,  H01L2224/13017

摘要： A semiconductor device includes a conductive pattern formed over a semiconductor substrate, and an interconnect structure formed over the conductive pattern, wherein the interconnect structure includes a graphene liner. The semiconductor device also includes an interconnect liner formed between the interconnect structure and the conductive pattern and surrounding the interconnect structure. The inner sidewall surfaces of the interconnect liner are in direct contact with the interconnect structure, and a maximum distance between outer sidewall surfaces of the interconnect liner is greater than a width of the conductive pattern. The semiconductor device further includes a semiconductor die bonded to the semiconductor substrate. The semiconductor die includes a conductive pad facing the interconnect structure, wherein the conductive pad is electrically connected to the conductive pattern.

公开(公告)号：US20240044976A1

公开(公告)日：2024-02-08

申请号：US17881811

申请日：2022-08-05

申请人： NANYA TECHNOLOGY CORPORATION

发明人： WU-DER YANG

IPC分类号： G01R31/317 ,  H03K17/687

CPC分类号： G01R31/31727 ,  H03K17/6871

摘要： An electronic device including a phase detector is provided. The phase detector includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a first equalizer device. The first transistor has a first input terminal configured to receive a first signal. The second transistor has a second input terminal configured to receive a second signal. The third transistor is electrically connected to the first transistor and has a first output terminal. The fourth transistor is electrically connected to the second transistor and has a second output terminal. The first equalizer device is connected between the first output terminal and the second input terminal.

公开(公告)号：US20240044957A1

公开(公告)日：2024-02-08

申请号：US18208474

申请日：2023-06-12

申请人： NANYA TECHNOLOGY CORPORATION

发明人： WU-DER YANG

IPC分类号： G01R25/00 ,  H03K17/687

CPC分类号： G01R25/00 ,  H03K17/6871

摘要： An electronic device and phase detector are provided. The phase detector includes a first input terminal, a second input terminal, a first input buffer, and a second input buffer. The first input buffer is electrically connected to the first input terminal. The second input buffer is electrically connected to the second input terminal.