公开(公告)号：US09203426B2

公开(公告)日：2015-12-01

申请号：US14302173

申请日：2014-06-11

申请人： ANALOG DEVICES TECHNOLOGY

发明人： Jialin Zhao ,  Richard E. Schreier ,  Jose Barreiro Silva ,  Hajime Shibata ,  Wenhua W. Yang ,  Yunzhi Dong

IPC分类号： H03M1/10 ,  H03M3/00

CPC分类号： H03M3/378 ,  H03M1/1019 ,  H03M1/1038 ,  H03M1/74 ,  H03M3/37 ,  H03M3/384 ,  H03M3/388 ,  H03M3/464

摘要： Digital-to-analog converters (DACs) are used widely in electronics. The DACs are usually not ideal and typically exhibits errors, e.g., static mismatch errors. This disclosure describes a digital calibration technique for DAC static mismatch in continuous-time delta-sigma modulators (CTDSMs). The methodology utilizes the DAC unit elements (UEs) themselves to measure each other's mismatch. There are no extra circuitries except for the logic design inside DAC drivers or comparators. The methodology is an attractive calibration technique for high performance CTDSMs, especially for high speed system in multi-gigahertz range with low over-sampling rate (OSR).

摘要翻译： 数模转换器（DAC）广泛应用于电子产品。 DAC通常不理想，并且通常表现出错误，例如静态失配错误。 本公开描述了用于连续时间Δ-Σ调制器（CTDSM）中的DAC静态失配的数字校准技术。 该方法利用DAC单元元件（UE）本身来测量彼此的不匹配。 没有额外的电路，除了DAC驱动器或比较器中的逻辑设计。 该方法是高性能CTDSM的有吸引力的校准技术，特别是对于具有低过采样率（OSR）的多千兆赫兹范围内的高速系统。

公开(公告)号：US20150116137A1

公开(公告)日：2015-04-30

申请号：US14394297

申请日：2013-04-11

申请人： PR Electronics A/S

发明人： Stig Lindemann ,  Mads Kolding Nielsen

IPC分类号： H03M1/46

CPC分类号： H03M1/46 ,  G01D3/022 ,  H03M1/0827 ,  H03M1/1042 ,  H03M3/388 ,  H03M3/46 ,  H03M7/302

摘要： A system for galvanic isolation between an analog input signal and an analog output signal, which system performs an analog to digital conversion of the input signals into input digital data. As a result, input parameters can be corrected in a nearly perfect way.

摘要翻译： 一种用于在模拟输入信号和模拟输出信号之间进行电隔离的系统，该系统将输入信号的模数转换转换为输入数字数据。 因此，输入参数可以以几乎完美的方式进行修正。

公开(公告)号：US20140368366A1

公开(公告)日：2014-12-18

申请号：US14302626

申请日：2014-06-12

申请人： The Regents of the University of California

发明人： Ian Galton ,  Gerry Taylor

IPC分类号： H03M3/00

CPC分类号： H03M3/386 ,  H03M3/30 ,  H03M3/38 ,  H03M3/388 ,  H03M3/412

摘要： A continuous-time delta-sigma modulator for analog-to-digital conversion includes a pair of pseudo-differential signal paths including a pair of pseudo-differential signal paths including current-controlled ring oscillators as the load of open-loop common-source amplifiers that are driven by an analog input signal. The signal path produces digital values by sampling the open-loop current-controlled ring oscillators. A calibration circuit measures nonlinear distortion coefficients in a replica of the signal path. A nonlinearity corrector corrects digital values based upon the nonlinear distortion coefficients

摘要翻译： 用于模数转换的连续时间Δ-Σ调制器包括一对伪差分信号路径，其包括一对伪差分信号路径，包括作为开环共源极放大器的负载的电流控制环形振荡器 由模拟输入信号驱动。 信号路径通过采样开环电流控制的环形振荡器产生数字值。 校准电路测量信号路径副本中的非线性失真系数。 非线性校正器基于非线性失真系数校正数字值

公开(公告)号：US08692700B2

公开(公告)日：2014-04-08

申请号：US13462345

申请日：2012-05-02

申请人： Paul M. Werking

发明人： Paul M. Werking

IPC分类号： H03M3/00

CPC分类号： H03M3/388 ,  H03M3/50

摘要： A sigma-delta digital-to-analog converter (SD DAC) exhibits undesirable distortion when implemented in an integrated circuit due to the non-linearity of polysilicon resistors used in the filtering stages of the SD DAC. By using resistors other than polysilicon for the output resistor of an SD DAC, distortion can be reduced or eliminated. Additionally or alternatively, by generating an error correction signal, the distortion can be corrected.

摘要翻译： 由于在SD DAC的滤波级中使用的多晶硅电阻的非线性，因此在集成电路中实现时，Σ-Δ数模转换器（SD DAC）表现出不期望的失真。 通过使用多晶硅之外的电阻作为SD DAC的输出电阻，可以减少或消除失真。 附加地或替代地，通过产生纠错信号，可以校正失真。

公开(公告)号：US07969335B2

公开(公告)日：2011-06-28

申请号：US12041204

申请日：2008-03-03

申请人： Jesus Arias ,  Peter Kiss ,  Johannes G. Ransijn ,  James D. Yoder

发明人： Jesus Arias ,  Peter Kiss ,  Johannes G. Ransijn ,  James D. Yoder

IPC分类号： H03M1/10

CPC分类号： H03M3/388 ,  H03M1/0665 ,  H03M3/424 ,  H03M3/464

摘要： Digital correction of multibit ADAC nonlinearities for error feedback DACs is provided. The integral nonlinearity (INL) error of the multibit ADAC is estimated (on line or off line) by a low-resolution calibration ADC (CADC) and stored in a random-access memory (RAM) table. The INL values are then used to compensate for the ADAC's distortion in the digital domain. When this compensation is combined with mismatch-shaping techniques such as DWA, the resolution requirement for CADC can be relaxed significantly. The implementation of the proposed correction circuit for error-feedback modulators is inherently simple, since the correction only needs a digital summation without any additional digital filtering.

摘要翻译： 提供了用于误差反馈DAC的多位ADAC非线性的数字校正。 通过低分辨率校准ADC（CADC）估计多位ADAC的积分非线性（INL）误差（在线或离线）并存储在随机存取存储器（RAM）表中。 然后，INL值用于补偿ADAC在数字域中的失真。 当这种补偿与DWA等不匹配成形技术相结合时，可以显着放宽CADC的分辨率要求。 所提出的用于误差反馈调制器的修正电路的实现本质上是简单的，因为校正仅需要数字求和而不需要任何额外的数字滤波。

公开(公告)号：US20100060499A1

公开(公告)日：2010-03-11

申请号：US12513067

申请日：2007-10-26

申请人： Jean-Michel Hode

发明人： Jean-Michel Hode

IPC分类号： H03M1/12

CPC分类号： H03M3/388 ,  H03M3/424

摘要： The present invention relates to a device for slaving a first component in a closed loop, a second component in the return circuit to the loop input having a multiplicative noise. It also relates to a sigma-delta modulator making it possible to convert an analog input signal into a digital output signal on the basis of an analog-to-digital converter slaved in a closed loop using this device. A compensation noise is added to the input signal of the slaving loop, the compensation noise being substantially equal to the input signal of the slaving loop multiplied by the multiplicative noise of the second component.

摘要翻译： 本发明涉及一种用于在闭合回路中从属于第一部件的第二部件，在具有乘法噪声的回路输入的回路中的第二部件。 它还涉及一种Σ-Δ调制器，其可以使用该装置在基于闭环的从模数转换器的基础上将模拟输入信号转换为数字输出信号。 补偿噪声被添加到从动回路的输入信号，补偿噪声基本上等于从动回路的输入信号乘以第二分量的乘法噪声。

公开(公告)号：US20080224914A1

公开(公告)日：2008-09-18

申请号：US12048955

申请日：2008-03-14

申请人： Takahiro Kawashima ,  Shinji Kurihara

发明人： Takahiro Kawashima ,  Shinji Kurihara

IPC分类号： H03M1/34 ,  G01J1/44

CPC分类号： G01J1/32 ,  G01J1/46 ,  H03M3/388 ,  H03M3/43 ,  H03M3/456 ,  H05B33/0854

摘要： An integrated circuit for analog-to-digital conversion for performing digital conversion of the amount of current of an input current and outputting a digital signal, comprises: a resistor connection terminal to be connected to a resistor; a conversion section configured to convert the amount of current of the input current or the amount of current of a reference current flowing through the resistor into a digital signal to be output; and a compensation section configured to compensate the digital signal corresponding to the input current based on the digital signal corresponding to the reference current.

摘要翻译： 一种用于模数转换的集成电路，用于对输入电流的电流量进行数字转换并输出数字信号，包括：电阻器连接端子，连接到电阻器; 转换部分，被配置为将流过电阻器的参考电流的输入电流的电流量或电流量转换成要输出的数字信号; 以及补偿部，被配置为基于与参考电流相对应的数字信号来补偿对应于输入电流的数字信号。

公开(公告)号：US07405686B2

公开(公告)日：2008-07-29

申请号：US11477149

申请日：2006-06-27

申请人： Rajiv Laroia ,  Tom Richardson ,  Frank A. Lane

发明人： Rajiv Laroia ,  Tom Richardson ,  Frank A. Lane

IPC分类号： H03M3/00 ,  H03M1/06

CPC分类号： H03F1/34 ,  H03F3/217 ,  H03M3/388 ,  H03M3/40 ,  H03M7/3006 ,  H03M7/3017 ,  H03M7/3028 ,  H03M7/3031 ,  H03M7/304

摘要： Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods and apparatus described herein allow for the use of switching amplifiers while reducing and/or compensating for distortions that the use of such amplifiers would normally create. The described methods and apparatus can be used alone or in combination with various novel signaling schemes which can make it easier to compensate for the non-ideal behavior of switching amplifiers in such a way as to enable practical application in wireless transmission and/or other applications.

摘要翻译： 描述了用于实现和/或使用放大器并执行各种放大相关操作的方法和装置。 这些方法非常适用于但不限于开关型放大器。 本文描述的方法和装置允许使用开关放大器，同时减少和/或补偿通常使用这种放大器的失真。 所描述的方法和装置可以单独使用或与各种新颖的信令方案组合使用，这可以使得更容易以这样的方式补偿开关放大器的非理想行为，使得无线传输和/或其他应用中的实际应用 。

公开(公告)号：US06967608B1

公开(公告)日：2005-11-22

申请号：US10877015

申请日：2004-06-25

申请人： Franco Maloberti ,  Jiang Yu ,  Koh Jinseok

发明人： Franco Maloberti ,  Jiang Yu ,  Koh Jinseok

IPC分类号： H03M3/00 ,  H03M3/04

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/454

摘要： A method for reducing the complexity of a multi-bit DAC in a sigma-delta ADC. The DAC resolution can be made to be less than that of the quantizer by canceling truncation error present in multi-bit DACs. Truncation errors are introduced by differences between the digital output word of the quantizer and the digital input word of the feedback DAC(s). The truncation error(s) can be cancelled and eliminated from the system transfer function. A preferred embodiment comprises expanding all feedback loops in the ADC, adding an adjusted truncation error for each feedback loop to an inner feedback loop, and then calculating a correction term for each adjusted truncation error. The correction term can be calculated by zeroing all signals except for the adjusted truncation error being canceled and then calculating a truncation error transfer function.

摘要翻译： 降低Σ-ΔADC中多位DAC复杂度的方法。 通过消除存在于多位DAC中的截断误差，可以使DAC分辨率小于量化器的分辨率。 截断误差由量化器的数字输出字与反馈DAC的数字输入字之间的差异引入。 可以从系统传输功能中取消并消除截断错误。 优选实施例包括扩展ADC中的所有反馈回路，将针对每个反馈回路的调整的截断误差加到内部反馈回路中，然后为每个调整的截断误差计算校正项。 校正项可以通过对除去调整的截断误差之外的所有信号归零，然后计算截断误差传递函数来计算。

公开(公告)号：US06653958B1

公开(公告)日：2003-11-25

申请号：US10019170

申请日：2002-06-05

申请人： Dominique Morche

发明人： Dominique Morche

IPC分类号： H03M106

CPC分类号： H03M3/388 ,  H03M3/424

摘要： The invention concerns a method for compensating the non-linearity of a sigma-delta analog-to-digital converter (A2) with quantization at N levels comprising a digital-to-analog converter (24). The method comprises a calibrating step which consists in transforming the multibit sigma-delta analog-to-digital converter (A2) into a sigma-delta analog-to-digital converter with quantization at three levels, then at two levels. The correction values of each level to be corrected are accurately measured. The method also comprises a normal functioning phase which consists, when the sigma-delta an analog-to-digital converter (A2) is operating with quantization at N levels, in producing an instantaneous correction of errors of the analog-to-digital converter (24) using said correction values.

摘要翻译： 本发明涉及一种用于在包括数模转换器（24）的N个电平上用量化来补偿Σ-Δ模数转换器（A2）的非线性的方法。 该方法包括校准步骤，其包括将多位Σ-Δ模数转换器（A2）变换成具有三级量化的Σ-Δ模数转换器，然后在两级。 准确地测量要校正的每个等级的校正值。 该方法还包括正常功能相位，其中当模拟数字转换器（A2）的Σ-Δ在N电平上以量化操作时，在产生模拟 - 数字转换器的误差的瞬时校正（ 24）使用所述校正值。