利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

25 条记录 (耗时 0.017 秒)

    LATERAL TRENCH MESFET
    2.
    发明申请
    LATERAL TRENCH MESFET 有权
    横向梯形管

    公开(公告)号：US20120305987A1

    公开(公告)日：2012-12-06

    申请号：US13152477

    申请日：2011-06-03

    申请人： Franz Hirler ,  Andreas Peter Meiser

    发明人： Franz Hirler ,  Andreas Peter Meiser

    IPC分类号： H01L29/812 ,  H01L21/338

    CPC分类号： H01L29/7789 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/2003

    摘要： A transistor includes a trench formed in a semiconductor body, the trench having sidewalls and a bottom. The transistor further includes a first semiconductor material disposed in the trench adjacent the sidewalls and a second semiconductor material disposed in the trench and spaced apart from the sidewalls by the first semiconductor material. The second semiconductor material has a different band gap than the first semiconductor material. The transistor also includes a gate material disposed in the trench and spaced apart from the first semiconductor material by the second semiconductor material. The gate material provides a gate of the transistor. Source and drain regions are arranged in the trench with a channel interposed between the source and drain regions in the first or second semiconductor material so that the channel has a lateral current flow direction along the sidewalls of the trench.

    摘要翻译： 晶体管包括形成在半导体本体中的沟槽，沟槽具有侧壁和底部。 晶体管还包括设置在与侧壁相邻的沟槽中的第一半导体材料和设置在沟槽中并与第一半导体材料与侧壁间隔开的第二半导体材料。 第二半导体材料具有与第一半导体材料不同的带隙。 晶体管还包括设置在沟槽中并且通过第二半导体材料与第一半导体材料间隔开的栅极材料。 栅极材料提供晶体管的栅极。 源极和漏极区域布置在沟槽中，沟道介于第一或第二半导体材料中的源极和漏极区域之间，使得沟道沿着沟槽的侧壁具有横向电流流动方向。

    DIE PACKAGE
    3.
    发明申请
    DIE PACKAGE 有权
    DIE包装

    公开(公告)号：US20120161128A1

    公开(公告)日：2012-06-28

    申请号：US12975448

    申请日：2010-12-22

    申请人： Stefan Macheiner ,  Andreas Peter Meiser

    发明人： Stefan Macheiner ,  Andreas Peter Meiser

    IPC分类号： H01L23/544

    CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L27/088 ,  H01L29/4175 ,  H01L29/41775 ,  H01L29/42368 ,  H01L29/7803 ,  H01L29/781 ,  H01L29/7835 ,  H01L2224/48247 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02P27/06 ,  H01L2924/00

    摘要： According to one embodiment, a die package is provided comprising a first die structure with a first plurality of switching elements wherein controlled current input terminals of the first plurality of switching elements are electrically coupled by a common contact region and wherein controlled current output terminals of the first plurality of switching elements are insulated from each other; a second die structure with a second plurality of switching elements wherein controlled current output terminals of the second plurality of switching elements are coupled by a common contact region and wherein controlled current input terminals of the second plurality of switching elements are insulated from each other; and wherein, for each of the first plurality of switching elements, the output terminal of the switching element is coupled with the input terminal of at least one switching element of the second plurality of switching elements.

    摘要翻译： 根据一个实施例，提供了一种管芯封装，其包括具有第一多个开关元件的第一管芯结构，其中第一多个开关元件的受控电流输入端子通过公共接触区域电耦合，并且其中受控电流输出端子 第一多个开关元件彼此绝缘; 具有第二多个开关元件的第二管芯结构，其中所述第二多个开关元件的受控电流输出端子通过公共接触区域耦合，并且其中所述第二多个开关元件的受控电流输入端子彼此绝缘; 并且其中，对于所述第一多个开关元件中的每一个，所述开关元件的输出端与所述第二多个开关元件中的至少一个开关元件的输入端耦合。

    Die package
    5.
    发明授权
    Die package 有权
    模包

    公开(公告)号：US08704269B2

    公开(公告)日：2014-04-22

    申请号：US12975448

    申请日：2010-12-22

    申请人： Stefan Macheiner ,  Andreas Peter Meiser

    发明人： Stefan Macheiner ,  Andreas Peter Meiser

    IPC分类号： H01L29/74

    CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L27/088 ,  H01L29/4175 ,  H01L29/41775 ,  H01L29/42368 ,  H01L29/7803 ,  H01L29/781 ,  H01L29/7835 ,  H01L2224/48247 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02P27/06 ,  H01L2924/00

    摘要： According to one embodiment, a die package is provided comprising a first die structure with a first plurality of switching elements wherein controlled current input terminals of the first plurality of switching elements are electrically coupled by a common contact region and wherein controlled current output terminals of the first plurality of switching elements are insulated from each other; a second die structure with a second plurality of switching elements wherein controlled current output terminals of the second plurality of switching elements are coupled by a common contact region and wherein controlled current input terminals of the second plurality of switching elements are insulated from each other; and wherein, for each of the first plurality of switching elements, the output terminal of the switching element is coupled with the input terminal of at least one switching element of the second plurality of switching elements.

    摘要翻译： 根据一个实施例，提供了一种管芯封装，其包括具有第一多个开关元件的第一管芯结构，其中第一多个开关元件的受控电流输入端子通过公共接触区域电耦合，并且其中受控电流输出端子 第一多个开关元件彼此绝缘; 具有第二多个开关元件的第二管芯结构，其中所述第二多个开关元件的受控电流输出端子通过公共接触区域耦合，并且其中所述第二多个开关元件的受控电流输入端子彼此绝缘; 并且其中，对于所述第一多个开关元件中的每一个，所述开关元件的输出端与所述第二多个开关元件中的至少一个开关元件的输入端耦合。

    Method and circuit for driving an electronic switch
    6.
    发明授权
    Method and circuit for driving an electronic switch 有权
    用于驱动电子开关的方法和电路

    公开(公告)号：US08638133B2

    公开(公告)日：2014-01-28

    申请号：US13160809

    申请日：2011-06-15

    申请人： Steffen Thiele ,  Andreas Peter Meiser ,  Franz Hirler

    发明人： Steffen Thiele ,  Andreas Peter Meiser ,  Franz Hirler

    IPC分类号： H03K3/00

    CPC分类号： H03K17/0822 ,  H03K17/14

    摘要： Disclosed is an electronic circuit. The electronic circuit includes a transistor having a control terminal to receive a drive signal, and a load path between a first and a second load terminal. A voltage protection circuit is coupled to the transistor, has a control input, is configured to assume one of an activated state and a deactivated state as an operation state dependent on a control signal received at the control input, and is configured to limit a voltage between the load terminals or between one of the load terminals and the control terminal. A control circuit is coupled to the control input of the voltage protection circuit and is configured to deactivate the voltage protection circuit dependent on at least one operation parameter of the transistor and when a voltage across the load path or a load current through the load path is other than zero.

    摘要翻译： 公开了一种电子电路。 电子电路包括具有用于接收驱动信号的控制端子和第一和第二负载端子之间的负载路径的晶体管。 电压保护电路耦合到晶体管，具有控制输入，被配置为取决于在控制输入端接收到的控制信号而将激活状态和去激活状态中的一个作为操作状态，并且被配置为限制电压 在负载端子之间或负载端子之一和控制端子之间。 控制电路耦合到电压保护电路的控制输入，并且被配置为取决于晶体管的至少一个操作参数取消激活电压保护电路，并且当负载路径上的电压或通过负载路径的负载电流为 除了零。

    Integrated circuit with ESD structure
    8.
    发明授权
    Integrated circuit with ESD structure 有权
    集成电路采用ESD结构

    公开(公告)号：US08368177B2

    公开(公告)日：2013-02-05

    申请号：US12905156

    申请日：2010-10-15

    申请人： Andreas Peter Meiser ,  Gerhard Prechtl ,  Nils Jensen

    发明人： Andreas Peter Meiser ,  Gerhard Prechtl ,  Nils Jensen

    IPC分类号： H01L21/70 ,  H01L29/66 ,  H01L29/00 ,  H01L21/20

    CPC分类号： H01L27/0259 ,  H01L23/60 ,  H01L29/7436 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit includes a semiconductor body of a first conductivity type. The semiconductor body includes a first semiconductor zone of a second conductivity type opposite the first conductivity type. The first semiconductor zone extends to a surface of the semiconductor body. A second semiconductor zone of the first conductivity type is embedded in the first semiconductor zone and extends as far as the surface. A third semiconductor zone of the second conductivity type at least partly projects from the first semiconductor zone along a lateral direction running parallel to the surface. A contact structure provides an electrical contact with the first and second semiconductor zones at the surface. The second semiconductor zone is arranged, along the lateral direction, between the part of the third semiconductor zone which projects from the first semiconductor zone and a part of the contact structure in contact with the first semiconductor zone.

    摘要翻译： 集成电路包括第一导电类型的半导体本体。 半导体本体包括与第一导电类型相反的第二导电类型的第一半导体区。 第一半导体区延伸到半导体本体的表面。 第一导电类型的第二半导体区域嵌入在第一半导体区域中并且延伸到表面的最远处。 第二导电类型的第三半导体区域沿着平行于表面的横向方向至少部分地从第一半导体区域突出。 接触结构提供与表面上的第一和第二半导体区的电接触。 第二半导体区沿着横向布置在从第一半导体区突出的第三半导体区的部分和与第一半导体区接触的接触结构的一部分之间。