公开(公告)号：US07245001B2

公开(公告)日：2007-07-17

申请号：US10915803

申请日：2004-08-11

申请人： Boyd L. Coomer ,  Michael Walk

发明人： Boyd L. Coomer ,  Michael Walk

IPC分类号： H01L29/40 ,  H01L21/48

CPC分类号： H01L21/4857 ,  H05K3/107 ,  H05K3/386 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/09554 ,  H05K2203/0315 ,  H05K2203/1142 ,  Y10T29/49126 ,  Y10T29/49128

摘要： Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.

摘要翻译： 将粘合材料施加到金属芯层的表面。 从金属芯层的导电区域去除粘合材料。 金属接触件设置在金属芯层的导电区域上。 金属芯层层压到压印堆积层上，积层层具有电介质区域和导电区域，其中金属芯层的非导电区域结合到堆积层的电介质区域和金属芯层的导电区域 芯层结合到印迹堆积层的导电区域。

公开(公告)号：US06777648B2

公开(公告)日：2004-08-17

申请号：US10042285

申请日：2002-01-11

申请人： Boyd L. Coomer

发明人： Boyd L. Coomer

IPC分类号： B23K2600

CPC分类号： H01L24/82 ,  H01L24/24 ,  H01L24/45 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/24051 ,  H01L2224/24145 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/82103 ,  H01L2225/06524 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method and system for electrically interconnecting a semiconductor device and a component is presented. The semiconductor device includes a dielectric portion on at least one face thereof. Similarly, the component includes a dielectric portion on at least one face thereof. The device and component are constructed and arranged to be stacked and bonded together. A first laser selectively ablates the respective dielectric portions of the device and component. The ablating creates a starting pad on the device or component and a destination pad on the device or component. A second laser deposits a conductor along a path between the starting pad and destination pad. As such, smaller, more condensed electronic packages may be fabricated.

摘要翻译： 提出了一种用于电连接半导体器件和部件的方法和系统。 半导体器件在其至少一个面上包括电介质部分。 类似地，组件在其至少一个面上包括电介质部分。 该装置和部件被构造和布置成堆叠并结合在一起。 第一激光器选择性地烧蚀器件和部件的相应电介质部分。 消融在设备或组件上创建启动焊盘，并在设备或组件上创建目标焊盘。 第二激光器沿着起始焊盘和目的地焊盘之间的路径沉积导体。 因此，可以制造更小，更浓缩的电子封装。

公开(公告)号：US06899815B2

公开(公告)日：2005-05-31

申请号：US10109792

申请日：2002-03-29

申请人： Boyd L. Coomer ,  Michael Walk

发明人： Boyd L. Coomer ,  Michael Walk

IPC分类号： H01L21/48 ,  H05K3/10 ,  H05K3/38 ,  H05K3/44 ,  H05K3/46 ,  H01B13/00

CPC分类号： H01L21/4857 ,  H05K3/107 ,  H05K3/386 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/09554 ,  H05K2203/0315 ,  H05K2203/1142 ,  Y10T29/49126 ,  Y10T29/49128

摘要： Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.

公开(公告)号：US07358116B2

公开(公告)日：2008-04-15

申请号：US10134951

申请日：2002-04-29

申请人： Boyd L. Coomer

发明人： Boyd L. Coomer

IPC分类号： H01L21/44

CPC分类号： H01L21/486 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/15312 ,  H05K3/243 ,  H05K3/4602 ,  H05K3/4647 ,  H05K2201/0179 ,  H05K2203/0369 ,  H05K2203/0733

摘要： A substrate with at least one conductive post formed prior to the formation of an inter-layer dielectric (ILD) coating on the substrate. The conductive post may be formed from a metal layer of the substrate. Additionally, the conductive post may be built up on the substrate.

摘要翻译： 在衬底上形成层间电介质（ILD）涂层之前形成有至少一个导电柱的衬底。 导电柱可以由衬底的金属层形成。 另外，导电柱可以在衬底上构建。

公开(公告)号：US07637008B2

公开(公告)日：2009-12-29

申请号：US10323165

申请日：2002-12-18

申请人： Thomas S. Dory ,  Michael Walk ,  Robert L. Sankman ,  Boyd L. Coomer

发明人： Thomas S. Dory ,  Michael Walk ,  Robert L. Sankman ,  Boyd L. Coomer

IPC分类号： H01R3/10

CPC分类号： H05K3/107 ,  H05K3/0014 ,  H05K3/005 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/1189 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A package includes at least one electronic component mounted on an imprinted substrate. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Such features may be formed by imprinting in one operation rather than sequentially. Conductor features, such as trenches, holes, and planes, may be formed of different sizes simultaneously. One or more vias may be formed in one or more trenches. Methods of fabricating an imprinted substrate, as well as application of the imprinted package to an electronic assembly, are also described.

摘要翻译： 封装包括安装在压印基板上的至少一个电子部件。 在一个实施例中，衬底可以包括导电迹线，通路和一个或多个层上的焊盘图案。 这些特征可以通过在一个操作中打印而不是顺序地形成。 诸如沟槽，孔和平面的导体特征可以同时由不同尺寸形成。 一个或多个通孔可以形成在一个或多个沟槽中。 还描述了制造印刷基板的方法，以及将压印封装应用于电子组件。

公开(公告)号：US06974775B2

公开(公告)日：2005-12-13

申请号：US10335196

申请日：2002-12-31

申请人： Milan Keser ,  Boyd L. Coomer

发明人： Milan Keser ,  Boyd L. Coomer

IPC分类号： H01L21/44 ,  H01L21/445 ,  H01L21/4763 ,  H01L21/48 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L21/4867 ,  H01L21/4846 ,  Y10T29/41

摘要： A method and apparatus for making an imprinted conductive circuit using semi-additive plating. A plurality of indented channels is formed on the substrate. The surface is coated with a conductive layer. Portions of the surface other than the indented channels are coated with a non-conductive layer, and metal is plated on the conductive layer in the channels. The non-conductive layer and the first conductive layer are removed from portions of the surface other than the indented channels. In some embodiments, a first set of channels has a first depth and a second set of channels has a second depth. The plating adds a first amount of metal in the first set of channels and the second set of channels. The first set of channels is coated with a non-conductive layer, and a second amount of additional conductive material is plated in the second set of channels.

摘要翻译： 一种使用半添加电镀制作印记导电电路的方法和装置。 在基板上形成多个凹入通道。 表面涂有导电层。 除了凹入通道之外的表面的一部分涂覆有非导电层，并且金属被镀在通道中的导电层上。 除了凹入通道之外的表面的部分去除非导电层和第一导电层。 在一些实施例中，第一组通道具有第一深度，并且第二组通道具有第二深度。 电镀在第一组通道和第二组通道中添加第一量的金属。 第一组通道涂覆有非导电层，并且第二组额外的导电材料被镀在第二组通道中。