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公开(公告)号:US08483343B2
公开(公告)日:2013-07-09
申请号:US12056084
申请日:2008-03-26
申请人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
发明人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
IPC分类号: H04L7/00
CPC分类号: H04L7/0083 , H03M1/0626 , H03M1/0692 , H03M1/0695 , H03M1/1042 , H03M1/1215 , H03M1/181 , H03M1/42 , H03M1/44 , H04L7/0004 , H04L7/0062 , H04L7/0087 , H04L25/0204 , H04L25/03038
摘要: A receiver (e.g., for a 10 G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decoder, for example a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.
摘要翻译: 接收机(例如,用于10G光纤通信链路)包括耦合到多通道均衡器的交错ADC,其可以为交错ADC内的不同ADC通道提供不同的均衡。 也就是说,多通道均衡器可以补偿信道相关的损伤。 在一种方法中,多信道均衡器是耦合到维特比解码器(例如滑块维特比解码器(SBVD))的前馈均衡器(FFE); 并且使用LMS算法适配维特比解码器的FFE和/或信道估计器。
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公开(公告)号:US20150253006A1
公开(公告)日:2015-09-10
申请号:US14639984
申请日:2015-03-05
摘要: An inventive apparatus for reducing emissions from a wood heater comprises (i) two or more volumes of a porous, catalyst-coated medium and (ii) one or more holders for the catalyst-coated medium. The one or more holders are structurally arranged to hold the volumes of the catalyst-coated medium in a specified spatial arrangement within an exhaust flue of the wood heater. The catalytic media are sized and shaped so that, in that specified spatial arrangement, the volumes obstruct substantially all straight-line paths from a combustion chamber of the wood heater through the exhaust flue past the volumes of the catalyst-coated medium. In the specified spatial arrangement, the volumes also leave unobstructed at least one tortuous exhaust gas flow path from the combustion chamber through the exhaust flue around and past the volumes of the catalyst-coated medium.
摘要翻译: 用于减少来自木材加热器的排放物的本发明的装置包括(i)两个或更多体积的多孔催化剂涂覆的介质和(ii)用于催化剂涂覆的介质的一个或多个保持器。 一个或多个保持器在结构上被布置成将木质加热器的排气烟道内的特定空间布置的催化剂涂覆介质的体积保持在容器内。 催化介质的尺寸和形状使得在这种特定的空间布置中,容积基本上阻碍了从木材加热器的燃烧室通过排气烟道经过催化剂涂覆的介质的体积的所有直线路径。 在指定的空间布置中,容积还使来自燃烧室的排气烟道周围和经过催化剂涂覆介质的体积的至少一个曲折的排气流动路径保持不受阻碍。
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公开(公告)号:US08831074B2
公开(公告)日:2014-09-09
申请号:US13013149
申请日:2011-01-25
申请人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
发明人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
CPC分类号: H04B10/5059 , H03M13/41 , H04B1/38 , H04B3/235 , H04B7/005 , H04B7/0456 , H04B10/25073 , H04B10/2941 , H04B10/40 , H04B10/6971 , H04B2001/0441 , H04B2201/709772 , H04L5/16 , H04L25/0202 , H04L25/025 , H04L25/03038 , H04L25/03057 , H04L2025/03477 , H04L2025/03617
摘要: A receiver (or transceiver) is selectable between a Gaussian mode and a non-Gaussian mode. In the non-Gaussian mode, a transformation block applies a non-linear transformation to signal samples to convert non-Gaussian noise in the signal samples to Gaussian or approximately Gaussian noise. In the Gaussian mode, the transformation block is bypassed. Samples are equalized using an equalizer configured to operate with a Gaussian or approximately Gaussian channel.
摘要翻译: 接收器(或收发器)可以在高斯模式和非高斯模式之间选择。 在非高斯模式中,变换块将非线性变换应用于信号样本以将信号样本中的非高斯噪声转换为高斯或高斯噪声。 在高斯模式中,绕过转换块。 使用被配置为与高斯或高斯通道操作的均衡器来对样本进行均衡。
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公开(公告)号:US08120428B2
公开(公告)日:2012-02-21
申请号:US12782237
申请日:2010-05-18
申请人: Antonio Montalvo , David McLaurin , Carl Grace
发明人: Antonio Montalvo , David McLaurin , Carl Grace
IPC分类号: H03F3/68
CPC分类号: H03F1/223 , H03F1/26 , H03F3/193 , H03F2200/294
摘要: Apparatus and methods are disclosed, such as those involving a low noise amplifier. One such apparatus includes a low noise amplifier circuit configured to receive a signal at an input node and to output an amplified signal at an output node. The low noise amplifier circuit includes a first transistor of a first polarity; and a second transistor of a second polarity complementary to the first polarity. The first and second transistors are connected in series between first and second supply voltage nodes via the output node. The circuit further includes a third transistor cascoded with one of the first transistor or the second transistor, but does not include a transistor cascoded with the other transistor. This configuration allows the low noise amplifier circuit to provide an increased high-frequency gain and linearity while having improved high-frequency system noise figure in, for example, deep submicron CMOS technology.
摘要翻译: 公开了诸如涉及低噪声放大器的装置和方法。 一种这样的装置包括低噪声放大器电路,其被配置为在输入节点处接收信号并在输出节点输出放大的信号。 低噪声放大器电路包括第一极性的第一晶体管; 以及与第一极性互补的第二极性的第二晶体管。 第一和第二晶体管经由输出节点串联连接在第一和第二电源电压节点之间。 电路还包括与第一晶体管或第二晶体管中的一个晶体管串联的第三晶体管,但不包括与另一晶体管级联的晶体管。 该配置允许低噪声放大器电路提供增加的高频增益和线性,同时在例如深亚微米CMOS技术中具有改善的高频系统噪声系数。
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公开(公告)号:US08094056B2
公开(公告)日:2012-01-10
申请号:US12283853
申请日:2008-09-15
申请人: Ali Nazemi , Georgios Asmanis , German Cesar Augusto Luna , Mahyar Kargar , Carl Grace , Sumant Ramprasad
发明人: Ali Nazemi , Georgios Asmanis , German Cesar Augusto Luna , Mahyar Kargar , Carl Grace , Sumant Ramprasad
IPC分类号: H03M1/20
CPC分类号: H03M1/1042 , H03M1/1215 , H03M1/44
摘要: A lookahead pipelined ADC architecture uses open-loop residue amplifiers with calibration. This approach is able to achieve a high-speed, high-accuracy ADC with reduced power consumption. In one aspect, an ADC pipeline unit includes a plurality of lookahead pipeline stages (i.e., an ADC lookahead pipeline) coupled to a calibration unit. The ADC lookahead pipeline uses open-loop residue amplifiers. The calibration unit compensates for non-linearity in the open-loop amplifiers.
摘要翻译: 先进的流水线ADC架构使用开环残余放大器进行校准。 这种方法能够实现具有降低功耗的高速,高精度ADC。 在一个方面,ADC流水线单元包括耦合到校准单元的多个先行流水线级(即,ADC先行流水线)。 ADC前端管道使用开环残留放大器。 校准单元补偿开环放大器中的非线性。
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公开(公告)号:US20110081152A1
公开(公告)日:2011-04-07
申请号:US12966987
申请日:2010-12-13
申请人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
发明人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
IPC分类号: H04B10/00
CPC分类号: H04L25/03038 , H03M1/0626 , H03M1/1004 , H03M1/1215 , H03M1/44 , H04B10/6971 , H04L1/0054 , H04L1/0071 , H04L1/06 , H04L25/0204 , H04L25/025 , H04L25/03057 , H04L25/03184 , H04L25/03292 , H04L2025/03356 , H04L2025/03426 , H04L2025/03477 , H04L2025/03617
摘要: A receiver (e.g., for a 10G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decoder, for example a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.
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公开(公告)号:US20080240325A1
公开(公告)日:2008-10-02
申请号:US12056084
申请日:2008-03-26
申请人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
发明人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
IPC分类号: H04L7/00
CPC分类号: H04L7/0083 , H03M1/0626 , H03M1/0692 , H03M1/0695 , H03M1/1042 , H03M1/1215 , H03M1/181 , H03M1/42 , H03M1/44 , H04L7/0004 , H04L7/0062 , H04L7/0087 , H04L25/0204 , H04L25/03038
摘要: A receiver (e.g., for a 10 G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decoder, for example a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.
摘要翻译: 接收机(例如,用于10G光纤通信链路)包括耦合到多通道均衡器的交错ADC,其可以为交错ADC内的不同ADC通道提供不同的均衡。 也就是说,多通道均衡器可以补偿信道相关的损伤。 在一种方法中,多信道均衡器是耦合到维特比解码器(例如滑块维特比解码器(SBVD))的前馈均衡器(FFE); 并且使用LMS算法适配维特比解码器的FFE和/或信道估计器。
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公开(公告)号:US08139630B2
公开(公告)日:2012-03-20
申请号:US12335493
申请日:2008-12-15
申请人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
发明人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
IPC分类号: H03H7/30
CPC分类号: H03M1/1042 , H03M1/0626 , H03M1/0692 , H03M1/0695 , H03M1/1215 , H03M1/181 , H03M1/42 , H03M1/44 , H04L1/0054 , H04L1/0071 , H04L7/0004 , H04L7/0062 , H04L7/0083 , H04L7/0087 , H04L25/0204 , H04L25/03038
摘要: A receiver (e.g., for a 10 G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decoder, for example a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.
摘要翻译: 接收机(例如,用于10G光纤通信链路)包括耦合到多通道均衡器的交错ADC,其可以为交错ADC内的不同ADC通道提供不同的均衡。 也就是说,多通道均衡器可以补偿信道相关的损伤。 在一种方法中,多信道均衡器是耦合到维特比解码器(例如滑块维特比解码器(SBVD))的前馈均衡器(FFE); 并且使用LMS算法适配维特比解码器的FFE和/或信道估计器。
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公开(公告)号:US20110285464A1
公开(公告)日:2011-11-24
申请号:US12782237
申请日:2010-05-18
申请人: Antonio Montalvo , David McLaurin , Carl Grace
发明人: Antonio Montalvo , David McLaurin , Carl Grace
IPC分类号: H03F3/45
CPC分类号: H03F1/223 , H03F1/26 , H03F3/193 , H03F2200/294
摘要: Apparatus and methods are disclosed, such as those involving a low noise amplifier. One such apparatus includes a low noise amplifier circuit configured to receive a signal at an input node and to output an amplified signal at an output node. The low noise amplifier circuit includes a first transistor of a first polarity; and a second transistor of a second polarity complementary to the first polarity. The first and second transistors are connected in series between first and second supply voltage nodes via the output node. The circuit further includes a third transistor cascoded with one of the first transistor or the second transistor, but does not include a transistor cascoded with the other transistor. This configuration allows the low noise amplifier circuit to provide an increased high-frequency gain and linearity while having improved high-frequency system noise figure in, for example, deep submicron CMOS technology.
摘要翻译: 公开了诸如涉及低噪声放大器的装置和方法。 一种这样的装置包括低噪声放大器电路,其被配置为在输入节点处接收信号并在输出节点输出放大的信号。 低噪声放大器电路包括第一极性的第一晶体管; 以及与第一极性互补的第二极性的第二晶体管。 第一和第二晶体管经由输出节点串联连接在第一和第二电源电压节点之间。 电路还包括与第一晶体管或第二晶体管中的一个晶体管串联的第三晶体管,但不包括与另一晶体管级联的晶体管。 该配置允许低噪声放大器电路提供增加的高频增益和线性,同时在例如深亚微米CMOS技术中具有改善的高频系统噪声系数。
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公开(公告)号:US07852913B2
公开(公告)日:2010-12-14
申请号:US11559850
申请日:2006-11-14
申请人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
发明人: Oscar E. Agazzi , Diego E. Crivelli , Hugo S. Carrer , Mario R. Hueda , German C. Luna , Carl Grace
IPC分类号: H03K5/159
CPC分类号: H04L25/03038 , H03M1/0626 , H03M1/1004 , H03M1/1215 , H03M1/44 , H04B10/6971 , H04L1/0054 , H04L1/0071 , H04L1/06 , H04L25/0204 , H04L25/025 , H04L25/03057 , H04L25/03184 , H04L25/03292 , H04L2025/03356 , H04L2025/03426 , H04L2025/03477 , H04L2025/03617
摘要: A receiver (e.g., for a 10 G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decoder, for example a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.
摘要翻译: 接收机(例如,用于10G光纤通信链路)包括耦合到多通道均衡器的交错ADC,其可以为交错ADC内的不同ADC通道提供不同的均衡。 也就是说,多通道均衡器可以补偿信道相关的损伤。 在一种方法中,多信道均衡器是耦合到维特比解码器(例如滑块维特比解码器(SBVD))的前馈均衡器(FFE); 并且使用LMS算法适配维特比解码器的FFE和/或信道估计器。
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