公开(公告)号：US08570863B2

公开(公告)日：2013-10-29

申请号：US12944472

申请日：2010-11-11

申请人： Chan Yong Lee

发明人： Chan Yong Lee

IPC分类号： G01R31/08

CPC分类号： H04W8/26 ,  H04W28/18 ,  H04W88/08

摘要： A method and apparatus for avoiding a collision of an uplink preamble using a cell identifier. In a case of installing a new small-sized base station in a mobile communication system, the method and apparatus may set a code parameter, a time parameter, and a frequency parameter, differently from a neighboring small-sized base station using the cell identifier even when dedicatedly using a preamble in a contention-free scheme to avoid a collision of the preamble, so that a random access preamble may be managed without occurrence of the collision with the neighboring small-sized base stations.

摘要翻译： 一种用于避免使用小区标识符的上行链路前导码的冲突的方法和装置。 在移动通信系统中安装新的小型基站的情况下，该方法和装置可以使用小区标识符与相邻的小型基站不同地设置码参数，时间参数和频率参数 即使专用于无竞争方案中的前导码以避免前导码的冲突，从而可以管理随机接入前导码而不发生与相邻小型基站的冲突。

公开(公告)号：US20130016574A1

公开(公告)日：2013-01-17

申请号：US13548484

申请日：2012-07-13

申请人： Jung-sik Kim ,  Cheol Kim ,  Sang-ho Shin ,  Jung-bae Lee ,  Chan-yong Lee ,  Sung-min Yim ,  Tae-seong Jang ,  Joo-sun Choi

发明人： Jung-sik Kim ,  Cheol Kim ,  Sang-ho Shin ,  Jung-bae Lee ,  Chan-yong Lee ,  Sung-min Yim ,  Tae-seong Jang ,  Joo-sun Choi

IPC分类号： G11C29/08 ,  G11C7/00

CPC分类号： G11C29/50016 ,  G11C5/04 ,  G11C11/40 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/40622 ,  G11C2211/4061 ,  G11C2211/4065

摘要： A semiconductor memory device having improved refresh characteristics includes a memory array including a plurality of memory cells; a test unit configured to test refresh characteristics of the memory array and generate a first fail address signal; a storage unit configured to store the first fail address signal; and a refresh unit configured to perform a refresh operation on the memory array, wherein the refresh unit is configured to receive the first fail address signal from the storage unit, perform the refresh operation on a first memory cell that does not correspond to the first fail address signal according to a first period, and perform the refresh operation on a second memory cell that corresponds to the first fail address signal according to a second period that is shorter than the first period.

摘要翻译： 具有改进的刷新特性的半导体存储器件包括包括多个存储器单元的存储器阵列; 测试单元，被配置为测试所述存储器阵列的刷新特性并产生第一故障地址信号; 存储单元，被配置为存储所述第一失败地址信号; 以及刷新单元，被配置为对所述存储器阵列执行刷新操作，其中所述刷新单元被配置为从所述存储单元接收所述第一故障地址信号，对与所述第一故障不对应的第一存储器单元执行刷新操作 根据第一期间的地址信号，根据比第一期间短的第二期间对与第一失败地址信号对应的第二存储单元进行刷新动作。

公开(公告)号：US20120164952A1

公开(公告)日：2012-06-28

申请号：US13332333

申请日：2011-12-20

申请人： Chan Yong LEE ,  Eun Seon CHO ,  Hong Soog KIM ,  Hyeon Ju OH ,  Hwan Souk YOO ,  Nam Hoon PARK

发明人： Chan Yong LEE ,  Eun Seon CHO ,  Hong Soog KIM ,  Hyeon Ju OH ,  Hwan Souk YOO ,  Nam Hoon PARK

IPC分类号： H04W24/00

CPC分类号： H04W24/08 ,  H04W24/02

摘要： An optimization system that minimizes a radio link failure may be provided. In the optimization system, a base station may include a measured data collecting unit to collect wireless environment data measured by a terminal included in a cell, a threshold managing unit to manage a threshold value associated with a radio link failure in a wireless section, an analyzing unit to manage a variable associated with a radio link failure, and to analyze a cause of the radio link failure, and a parameter changing unit to change a parameter value based on an analysis result of the analyzing unit.

摘要翻译： 可以提供使无线电链路故障最小化的优化系统。 在优化系统中，基站可以包括测量数据收集单元，用于收集由小区中包括的终端测量的无线环境数据，阈值管理单元，用于管理与无线部分中的无线链路故障相关联的阈值， 分析单元来管理与无线电链路故障相关联的变量，并且分析无线电链路故障的原因;以及参数改变单元，用于基于分析单元的分析结果来改变参数值。

公开(公告)号：US20110039567A1

公开(公告)日：2011-02-17

申请号：US12858113

申请日：2010-08-17

申请人： Chan Yong LEE ,  Eun Seon CHO ,  Hong Soog KIM ,  Nam Hoon PARK

发明人： Chan Yong LEE ,  Eun Seon CHO ,  Hong Soog KIM ,  Nam Hoon PARK

IPC分类号： H04W72/04

CPC分类号： H04W74/085 ,  H04W24/02 ,  H04W84/045

摘要： Provided is a method and apparatus for avoiding a collision of a preamble in a base station. When a new base station is installed in a mobile communication system and in this instance, an exclusive preamble using a contention-free scheme is employed to avoid a preamble collision, at least one of a code parameter, a time parameter, and a frequency parameter used in a preamble of the new base station may be set to be different from a code parameter, a time parameter, and a frequency parameter used in a preamble of a neighboring cell, whereby it is possible to manage a random access preamble without causing a collision between cells.

摘要翻译： 提供了一种用于避免基站中的前导码的冲突的方法和装置。 当新的基站安装在移动通信系统中，并且在这种情况下，使用无争用方案的独占前同步码来避免前同步码冲突，代码参数，时间参数和频率参数中的至少一个 可以将新基站的前同步码中使用的参数设定为与相邻小区的前导码中使用的码参数，时间参数和频率参数不同，由此可以管理随机接入前同步码而不引起 细胞之间的碰撞

公开(公告)号：US20090139077A1

公开(公告)日：2009-06-04

申请号：US12201490

申请日：2008-08-29

申请人： Chan-Yong LEE

发明人： Chan-Yong LEE

IPC分类号： B23P11/00

CPC分类号： B24B37/28 ,  Y10T29/49982

摘要： Provided is a method of manufacturing a wafer carrier capable of providing good abrasion resistance to remarkably increase lifespan of the wafer carrier, and preventing occurrence of defects from an edge of a wafer during double-sided polishing of the wafer. The method includes machining a carrier body constituting the wafer carrier in a pre-set shape, forming a preliminary hole and a slurry introduction hole in the carrier body of the wafer carrier, coating diamond-like carbon (DLC) on the carrier body having the preliminary hole, and, after coating the DLC, enlarging the preliminary hole to form a wafer retaining hole, into which the wafer is inserted.

摘要翻译： 提供一种制造晶片载体的方法，其能够提供良好的耐磨性，以显着提高晶片载体的寿命，并且在晶片的双面抛光期间防止从晶片边缘发生缺陷。 该方法包括以预定形状加工构成晶片载体的载体，在晶片载体的载体中形成预备孔和浆料引入孔，在载体上涂覆类金刚石碳（DLC），其具有 预备孔，并且在涂覆DLC之后，扩大预备孔以形成晶片插入其中的晶片保持孔。

公开(公告)号：USD446197S1

公开(公告)日：2001-08-07

申请号：US29129734

申请日：2000-09-20

申请人： Chan Yong Lee

设计人： Chan Yong Lee

公开(公告)号：US09588840B2

公开(公告)日：2017-03-07

申请号：US14225686

申请日：2014-03-26

申请人： Hoi-ju Chung ,  Chul-sung Park ,  Tae-young Oh ,  Jang-woo Ryu ,  Chan-yong Lee ,  Tae-seong Jang ,  Gong-heum Han

发明人： Hoi-ju Chung ,  Chul-sung Park ,  Tae-young Oh ,  Jang-woo Ryu ,  Chan-yong Lee ,  Tae-seong Jang ,  Gong-heum Han

IPC分类号： G06F11/10 ,  G06F11/32

CPC分类号： G06F11/1048 ,  G06F11/1008 ,  G06F11/1068 ,  G06F11/1072 ,  G06F11/1076

摘要： A method of operating a memory device includes: generating an internal read command in response to a received masked write command, the internal read command being generated one of (i) during a write latency associated with the received masked write command, (ii) after receipt of a first bit of masked write data among a plurality of bits of masked write data, and (iii) in synchronization with a rising or falling edge of a clock signal received with an address signal corresponding to the masked write command; reading, in response to the internal read command, a plurality of bits of data stored in a plurality of memory cells, the plurality of memory cells corresponding to the address signal; and storing, in response to an internal write command, the plurality of bits of masked write data in the plurality of memory cells.

摘要翻译： 一种操作存储器件的方法包括：响应于接收到的屏蔽写入命令产生内部读取命令，内部读取命令被生成（i）在与所接收的被屏蔽写入命令相关联的写入延迟期间，（ii）之后 在多个屏蔽写入数据位之间接收第一位掩蔽写入数据，以及（iii）与用与掩蔽写入命令对应的地址信号接收的时钟信号的上升沿或下降沿同步; 响应于所述内部读取命令，读取存储在多个存储器单元中的多个位数据，所述多个存储器单元对应于所述地址信号; 以及响应于内部写入命令，在所述多个存储器单元中存储所述多个掩码写入数据位。

公开(公告)号：US09036439B2

公开(公告)日：2015-05-19

申请号：US13548484

申请日：2012-07-13

申请人： Jung-sik Kim ,  Cheol Kim ,  Sang-ho Shin ,  Jung-bae Lee ,  Chan-yong Lee ,  Sung-min Yim ,  Tae-seong Jang ,  Joo-sun Choi

发明人： Jung-sik Kim ,  Cheol Kim ,  Sang-ho Shin ,  Jung-bae Lee ,  Chan-yong Lee ,  Sung-min Yim ,  Tae-seong Jang ,  Joo-sun Choi

IPC分类号： G11C29/08 ,  G11C7/00 ,  G11C29/50 ,  G11C11/406 ,  G11C5/04 ,  G11C11/40

CPC分类号： G11C29/50016 ,  G11C5/04 ,  G11C11/40 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/40622 ,  G11C2211/4061 ,  G11C2211/4065

摘要： A semiconductor memory device having improved refresh characteristics includes a memory array including a plurality of memory cells; a test unit configured to test refresh characteristics of the memory array and generate a first fail address signal; a storage unit configured to store the first fail address signal; and a refresh unit configured to perform a refresh operation on the memory array, wherein the refresh unit is configured to receive the first fail address signal from the storage unit, perform the refresh operation on a first memory cell that does not correspond to the first fail address signal according to a first period, and perform the refresh operation on a second memory cell that corresponds to the first fail address signal according to a second period that is shorter than the first period.

摘要翻译： 具有改进的刷新特性的半导体存储器件包括包括多个存储器单元的存储器阵列; 测试单元，被配置为测试所述存储器阵列的刷新特性并产生第一故障地址信号; 存储单元，被配置为存储所述第一失败地址信号; 以及刷新单元，被配置为对所述存储器阵列执行刷新操作，其中所述刷新单元被配置为从所述存储单元接收所述第一故障地址信号，对与所述第一故障不对应的第一存储器单元执行刷新操作 根据第一期间的地址信号，根据比第一期间短的第二期间对与第一失败地址信号对应的第二存储单元进行刷新动作。

公开(公告)号：US20140317470A1

公开(公告)日：2014-10-23

申请号：US14225686

申请日：2014-03-26

申请人： Hoi-ju CHUNG ,  Chul-sung PARK ,  Tae-young OH ,  Jang-woo RYU ,  Chan-yong LEE ,  Tae-seong JANG ,  Gong-heum HAN

发明人： Hoi-ju CHUNG ,  Chul-sung PARK ,  Tae-young OH ,  Jang-woo RYU ,  Chan-yong LEE ,  Tae-seong JANG ,  Gong-heum HAN

IPC分类号： G06F11/10

CPC分类号： G06F11/1048 ,  G06F11/1008 ,  G06F11/1068 ,  G06F11/1072 ,  G06F11/1076

摘要： A method of operating a memory device includes: generating an internal read command in response to a received masked write command, the internal read command being generated one of (i) during a write latency associated with the received masked write command, (ii) after receipt of a first bit of masked write data among a plurality of bits of masked write data, and (iii) in synchronization with a rising or falling edge of a clock signal received with an address signal corresponding to the masked write command; reading, in response to the internal read command, a plurality of bits of data stored in a plurality of memory cells, the plurality of memory cells corresponding to the address signal; and storing, in response to an internal write command, the plurality of bits of masked write data in the plurality of memory cells.

摘要翻译： 一种操作存储器件的方法包括：响应于接收到的屏蔽写入命令产生内部读取命令，内部读取命令被生成（i）在与所接收的被屏蔽写入命令相关联的写入延迟期间，（ii）之后 在多个屏蔽写入数据位之间接收第一位掩蔽写入数据，以及（iii）与用与掩蔽写入命令对应的地址信号接收的时钟信号的上升沿或下降沿同步; 响应于所述内部读取命令，读取存储在多个存储器单元中的多个位数据，所述多个存储器单元对应于所述地址信号; 以及响应于内部写入命令，在所述多个存储器单元中存储所述多个掩码写入数据位。

公开(公告)号：US20110287756A1

公开(公告)日：2011-11-24

申请号：US13112510

申请日：2011-05-20

申请人： Eun Seon CHO ,  Chan Yong Lee ,  Hong Soog Kim ,  Nam Hoon Park

发明人： Eun Seon CHO ,  Chan Yong Lee ,  Hong Soog Kim ,  Nam Hoon Park

IPC分类号： H04W52/02

CPC分类号： H04W52/0229 ,  H04W52/0206 ,  Y02D70/00

摘要： Provided are a method and an apparatus for power saving of a femto base station operating as a CSG cell in a wireless communication system. A femto base station according to an exemplary embodiment of the present invention includes: a reception unit receiving signals from adjacent second femto base stations; a transmission unit transmitting signals to second femto base stations, and a control unit controlling to be transitioned to an active mode when a mode transition command is received from at least one second femto base station while operating in a sleep mode, in a wireless communication system constituted by a plurality of femto base stations using automatic neighbor relation (ANR).

摘要翻译： 提供了一种在无线通信系统中作为CSG小区工作的毫微微基站的省电的方法和装置。 根据本发明示例性实施例的毫微微基站包括：接收单元，从相邻的第二毫微微基站接收信号; 传输单元，向第二毫微微基站发送信号;以及控制单元，在无线通信系统中，当在睡眠模式下操作时从至少一个第二毫微微基站接收到模式转换命令时，转换到活动模式 由使用自动相邻关系（ANR）的多个毫微微基站构成。