Abstract:
Provided is a fuel cell system in which a plurality of electricity generating units each including a unit cell in which an anode electrode and a cathode electrode are formed on both sides of an electrolyte film to use an electrochemical reaction of a fuel and an oxidizing agent to generate an electrical energy and a pair of separating plates which are disposed on both surfaces of the unit cell and have passages through which a fuel and an oxidizing agent are supplied to the anode electrode and the cathode electrode are laminated in which the electricity generating unit has a structure where a fuel flowing direction and/or a flowing direction of the fuel or the oxidizing agent are different between neighboring electricity generating units.
Abstract:
In accordance with the present invention, there is provided multiple embodiments of a semiconductor package including one or more semiconductor dies which are electrically connected to an underlying substrate through the use of a conductive pattern which is at least partially embedded in a patterning layer of the package. In a basic embodiment of the present invention, the semiconductor package comprises a substrate having a conductive pattern disposed thereon. Electrically connected to the conductive pattern of the substrate is at least one semiconductor die. The semiconductor die and the substrate are at least partially encapsulated by a patterning layer. Embedded in the patterning layer is a wiring pattern which electrically connects the semiconductor die to the conductive pattern. A portion of the wiring pattern is exposed in the patterning layer.
Abstract:
A plasma processing apparatus comprising: a process chamber for defining a plasma processing space in which a substrate holder for mounting a substrate thereon is installed; a plasma chamber in communication with an upper portion of the process chamber to generate and inject plasma into the plasma processing space such that the substrate is processed; a screen interposed between the process chamber and the plasma chamber to block plasma ions from being injected from the plasma chamber; and an ion trap for protecting the surface of the substrate from damage due to the injected plasma ion.
Abstract:
A plasma etch apparatus is disclosed. The plasma etch apparatus includes an electrostatic chuck for loading a wafer; an insulation portion surrounding the electrostatic chuck; and a focus ring disposed on the electrostatic chuck and the insulation portion. The focus ring has a concave-convex configuration.
Abstract:
Provided is a composite ceramic material for a fuel cell and a method for manufacturing the same. The composite ceramic material for the fuel cell forms a cored structure where perovskite ceramic particles having a small particle diameter surround lanthanum cobaltite particles having a large particle diameter, and lanthanum cobaltite is added as a starting material in a process of synthesizing the perovskite ceramic particles to be synthesized. The composite ceramic material for the fuel cell described herein improves an electric connection characteristic between a separation plate and a polar plate of the fuel cell, and is chemically and mechanically stable.
Abstract:
In accordance with the present invention, there is provided multiple embodiments of a semiconductor package including one or more semiconductor dies which are electrically connected to an underlying substrate through the use of a conductive pattern which is at least partially embedded in a patterning layer of the package. In a basic embodiment of the present invention, the semiconductor package comprises a substrate having a conductive pattern disposed thereon. Electrically connected to the conductive pattern of the substrate is at least one semiconductor die. The semiconductor die and the substrate are at least partially encapsulated by a patterning layer. Embedded in the patterning layer is a wiring pattern which electrically connects the semiconductor die to the conductive pattern. A portion of the wiring pattern is exposed in the patterning layer.
Abstract:
A plasma processing apparatus comprising: a process chamber for defining a plasma processing space in which a substrate holder for mounting a substrate thereon is installed; a plasma chamber in communication with an upper portion of the process chamber to generate and inject plasma into the plasma processing space such that the substrate is processed; a screen interposed between the process chamber and the plasma chamber to block plasma ions from being injected from the plasma chamber; and an ion trap for protecting the surface of the substrate from damage due to the injected plasma ion.
Abstract:
A multiple reaction chamber system includes a transfer chamber, a load lock chamber connected to the transfer chamber, and a plurality of reaction chambers connected to the transfer chamber. An alignment chamber is connected to the transfer chamber, disposed along a path of wafer transfer from the load lock chamber to the plurality of reaction chambers, and includes a wafer aligner. A wafer recognition, disposed along a post-aligner portion of the path of wafer transfer system, recognizes an identification code of an individual wafer. A controlling system is in data communication with the wafer recognition system for selecting a selected chamber of the plurality of reaction chambers into which the individual wafer is to be transferred. Because individual wafers can be associated with each reaction chamber, a defective reaction chamber can be identified immediately and its use discontinued so that unproductive operations can be eliminated.
Abstract:
An ion implanter and an ion implanting method compatible for both positive and negative ions. The ion implanter has an ion extractor and a mass analyzer for deflecting ions, having one of a positive or negative charged state, in a predetermined direction regardless of the charged state of the ions. A polarity converter changes the flux direction of a magnetic field in the mass analyzer according to the charged state of the ions. Thus, shallow and deep impurity layers can be formed into wafers without changing ion implanters, such that BF.sup.+ as well as B.sup.+ or P.sup.+ can be implanted with a single ion implanter. As a result, the product yield of a semiconductor device can be improved.