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公开(公告)号:USD759352S1
公开(公告)日:2016-06-21
申请号:US29518071
申请日:2015-02-19
申请人: Stephen Eric Palmer
设计人: Stephen Eric Palmer
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公开(公告)号:US20090277512A1
公开(公告)日:2009-11-12
申请号:US12414298
申请日:2009-03-30
CPC分类号: F16H57/0447 , F16H57/0409 , Y10T137/7287 , Y10T137/7297 , Y10T137/7303 , Y10T137/731 , Y10T137/86067 , Y10T137/86187 , Y10T137/86879
摘要: A system for controlling the level of hydraulic fluid between a first and second sump in a transmission includes a valve assembly located within the first sump. The valve assembly includes a valve that is moveable between two positions. The valve assembly includes first and second inlet ports that communicate with the first sump and an outlet port that communicates with the second sump. The second inlet port has an opening that is located higher than an opening to the first inlet port. Hydraulic fluid within the first sump communicates through the first inlet port to the outlet port when the valve is in the first position, and hydraulic fluid within the first sump communicates through the second inlet port to the outlet port when the valve is in the second position.
摘要翻译: 用于控制变速器中的第一和第二贮槽之间的液压流体水平的系统包括位于第一贮槽内的阀组件。 阀组件包括可在两个位置之间移动的阀。 阀组件包括与第一贮槽连通的第一和第二入口端口以及与第二贮槽连通的出口端口。 第二入口具有位于比通向第一入口的开口高的开口。 当阀处于第一位置时,第一贮槽内的液压流体通过第一入口连通到出口,当阀处于第二位置时,第一贮槽内的液压流体通过第二入口连通到出口 。
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公开(公告)号:US08188594B2
公开(公告)日:2012-05-29
申请号:US12587175
申请日:2009-10-01
CPC分类号: H01L23/34 , H01L23/367 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L23/66 , H01L2223/6627 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/15192 , H01L2924/19032 , H01L2224/0401
摘要: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.
摘要翻译: 高速I / O迹线是集成电路封装基板的I / O封装架构的一部分。 集成电路封装衬底包括在芯片侧的集成的散热器占地面积,并且I / O迹线与要设置在IHS占地面积内的IC器件耦合。 I / O跟踪包括IHS封装之外的引脚输出端子,以连接到要设置在IHS占用空间之外的IC器件。 高速I / O跟踪可以维持从5吉比特每秒(Gb / s)到40 Gb / s的处理器的数据流速。
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公开(公告)号:US08113237B2
公开(公告)日:2012-02-14
申请号:US12414298
申请日:2009-03-30
IPC分类号: B67D7/58
CPC分类号: F16H57/0447 , F16H57/0409 , Y10T137/7287 , Y10T137/7297 , Y10T137/7303 , Y10T137/731 , Y10T137/86067 , Y10T137/86187 , Y10T137/86879
摘要: A system for controlling the level of hydraulic fluid between a first and second sump in a transmission includes a valve assembly located within the first sump. The valve assembly includes a valve that is moveable between two positions. The valve assembly includes first and second inlet ports that communicate with the first sump and an outlet port that communicates with the second sump. The second inlet port has an opening that is located higher than an opening to the first inlet port. Hydraulic fluid within the first sump communicates through the first inlet port to the outlet port when the valve is in the first position, and hydraulic fluid within the first sump communicates through the second inlet port to the outlet port when the valve is in the second position.
摘要翻译: 用于控制变速器中的第一和第二贮槽之间的液压流体水平的系统包括位于第一贮槽内的阀组件。 阀组件包括可在两个位置之间移动的阀。 阀组件包括与第一贮槽连通的第一和第二入口端口以及与第二贮槽连通的出口端口。 第二入口具有位于比通向第一入口的开口高的开口。 当阀处于第一位置时,第一油底壳内的液压流体通过第一入口连接到出口,当阀处于第二位置时,第一油底壳内的液压流体通过第二入口连通到出口 。
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公开(公告)号:US07705447B2
公开(公告)日:2010-04-27
申请号:US12286212
申请日:2008-09-29
IPC分类号: H01L23/34 , H01L23/495 , H01L23/10 , H01L23/28
CPC分类号: H01L23/34 , H01L23/367 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L23/66 , H01L2223/6627 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/15192 , H01L2924/19032 , H01L2224/0401
摘要: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.
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公开(公告)号:US20070117339A1
公开(公告)日:2007-05-24
申请号:US11626606
申请日:2007-01-24
申请人: Todd Myers , Nicholas Watts , Eric Palmer , Renee Defeo , Jui Lim
发明人: Todd Myers , Nicholas Watts , Eric Palmer , Renee Defeo , Jui Lim
CPC分类号: H01L23/49827 , H01L2924/0002 , H05K1/115 , H05K3/064 , H05K3/403 , H05K3/4644 , H05K2201/09645 , H05K2201/09827 , H01L2924/00
摘要: A method for forming an plurality of paths on a substrate includes drilling an opening for a via to a depth to expose a first pad and a second pad, lining the opening with a conductive material, and insulating a first portion of the lining in the opening from a second portion of the lining in the opening to form a first electrical path contacting the first pad and a second electrical path contacting the second pad.
摘要翻译: 一种用于在基板上形成多个路径的方法包括:将用于通孔的开口钻出一定深度,以暴露第一垫和第二垫,用导电材料衬套开口,并将开口的第一部分在开口 从开口中的衬里的第二部分形成接触第一焊盘的第一电路径和接触第二焊盘的第二电路径。
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公开(公告)号:US20100096743A1
公开(公告)日:2010-04-22
申请号:US12587175
申请日:2009-10-01
CPC分类号: H01L23/34 , H01L23/367 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L23/66 , H01L2223/6627 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/15192 , H01L2924/19032 , H01L2224/0401
摘要: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.
摘要翻译: 高速I / O迹线是集成电路封装基板的I / O封装架构的一部分。 集成电路封装衬底包括在芯片侧的集成的散热器占地面积,并且I / O迹线与要设置在IHS占地面积内的IC器件耦合。 I / O跟踪包括IHS封装之外的引脚输出端子,以连接到要设置在IHS占用空间之外的IC器件。 高速I / O跟踪可以维持从5吉比特每秒(Gb / s)到40 Gb / s的处理器的数据流速。
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公开(公告)号:US20100078781A1
公开(公告)日:2010-04-01
申请号:US12286212
申请日:2008-09-29
CPC分类号: H01L23/34 , H01L23/367 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L23/66 , H01L2223/6627 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/15192 , H01L2924/19032 , H01L2224/0401
摘要: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.
摘要翻译: 高速I / O迹线是集成电路封装基板的I / O封装架构的一部分。 集成电路封装衬底包括在芯片侧的集成的散热器占地面积,并且I / O迹线与要设置在IHS占地面积内的IC器件耦合。 I / O跟踪包括IHS封装之外的引脚输出端子,以连接到要设置在IHS占用空间之外的IC器件。 高速I / O跟踪可以维持从5吉比特每秒(Gb / s)到40 Gb / s的处理器的数据流速。
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公开(公告)号:US20050133918A1
公开(公告)日:2005-06-23
申请号:US10740957
申请日:2003-12-17
申请人: Todd Myers , Nicholas Watts , Eric Palmer , Renee Defeo , Jui Lim
发明人: Todd Myers , Nicholas Watts , Eric Palmer , Renee Defeo , Jui Lim
CPC分类号: H01L23/49827 , H01L2924/0002 , H05K1/115 , H05K3/064 , H05K3/403 , H05K3/4644 , H05K2201/09645 , H05K2201/09827 , H01L2924/00
摘要: A system includes a device having at least one integrated circuit. The integrated circuit further includes a first layer of conductive material, a second layer of conductive material, and a via having multiple electrical paths for interconnecting the first layer of conductive material and the second layer of conductive material. A method for forming a via includes drilling an opening to a depth to expose a first pad and a second pad, lining the opening with a conductive material, and insulating a first portion of the lining in the opening from a second portion of the lining in the opening to form a first electrical path contacting the first pad and a second electrical path contacting the second pad.
摘要翻译: 一种系统包括具有至少一个集成电路的装置。 集成电路还包括第一导电材料层,第二导电材料层,以及具有用于互连导电材料的第一层和第二导电材料层的多条电路的通路。 用于形成通孔的方法包括将开口钻出一定深度以露出第一垫和第二垫,用导电材料衬套开口,并将开口中的衬里的第一部分与衬里的第二部分绝缘 所述开口形成接触所述第一焊盘的第一电路径和与所述第二焊盘接触的第二电路径。
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10.
公开(公告)号:US20050121769A1
公开(公告)日:2005-06-09
申请号:US10729544
申请日:2003-12-05
申请人: Nicholas Watts , Eric Palmer , Jui Lim , Todd Myers , Boonsri Wangmaneerat
发明人: Nicholas Watts , Eric Palmer , Jui Lim , Todd Myers , Boonsri Wangmaneerat
IPC分类号: H01L21/44 , H01L21/98 , H01L23/04 , H01L23/498 , H01L25/10
CPC分类号: H01L25/50 , H01L23/4985 , H01L25/105 , H01L2224/16 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331
摘要: In some embodiments, a method includes providing a substrate, providing a coverlay blank, laminating the coverlay blank to the substrate, and forming at least one opening in the coverlay blank by photolithography.
摘要翻译: 在一些实施例中,一种方法包括提供衬底,提供覆盖层坯料,将覆盖层坯料层压到衬底上,以及通过光刻法在覆盖层坯料中形成至少一个开口。
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