Clock and data regenerator with demultiplexer function
    1.
    发明授权
    Clock and data regenerator with demultiplexer function 失效
    具有解复用器功能的时钟和数据再生器

    公开(公告)号:US06888906B2

    公开(公告)日:2005-05-03

    申请号:US09941082

    申请日:2001-08-28

    CPC分类号: H04L7/033 H03L7/091 H04J3/047

    摘要: Clock and data regenerator with demultiplexer function wherein the clock and phase generator operates with four sampling flip-flops whose output signals are compared with one another with the aid of two pairs of EXOR elements. The associated phase signals generated by the EXOR elements are added and compared with one another. The phase regulating voltage thus obtained controls an oscillator which generates the sampling clock signals.

    摘要翻译: 具有解复用器功能的时钟和数据再生器,其中时钟和相位发生器与四个采样触发器一起工作,四个采样触发器的输出信号借助两对EXOR元件相互比较。 由EXOR元素生成的相关相位信号被相加并相互比较。 由此获得的相位调节电压控制产生采样时钟信号的振荡器。

    Asymmetrical differential amplifier as level converter
    2.
    发明授权
    Asymmetrical differential amplifier as level converter 失效
    不对称差分放大器作为电平转换器

    公开(公告)号:US4939478A

    公开(公告)日:1990-07-03

    申请号:US282695

    申请日:1988-12-12

    摘要: An asymmetrical differential amplifier as a level converter has two transistors, a constant current source and two resistors, whereby the first transistor is a MOS transistor and the second transistor is a bipolar npn transistor. Input signals having CMOS level can be applied to an input on the input side of the differential amplifier, whereas output signals having ECL level can be taken at an output. In addition to being a differential amplifier, the circuit also produces a level conversion between CMOS level at the input side and ECL level at the output side.

    摘要翻译: 作为电平转换器的不对称差分放大器具有两个晶体管,即恒流源和两个电阻,由此第一晶体管是MOS晶体管,第二晶体管是双极性npn晶体管。 可以将具有CMOS电平的输入信号施加到差分放大器的输入侧的输入,而具有ECL电平的输出信号可以在输出端获取。 除了作为差分放大器之外,该电路还在输入侧的CMOS电平和输出侧的ECL电平之间产生电平转换。

    Electronic device and method for an amplifier with resistive feedback
    3.
    发明授权
    Electronic device and method for an amplifier with resistive feedback 有权
    具有电阻反馈的放大器的电子装置和方法

    公开(公告)号:US08558612B2

    公开(公告)日:2013-10-15

    申请号:US13410087

    申请日:2012-03-01

    IPC分类号: H03F1/36

    摘要: An electronic device comprising an amplifier having at least a first input transistor of a first doping type. A first transistor is coupled with a channel as a feedback path between an output of the amplifier and a control gate of the first input transistor forming an input of the amplifier. A diode-coupled second transistor is coupled with a channel between a first current source and the output of the amplifier wherein a control gate of the first transistor is coupled between the first current source and the diode-coupled second transistor and the first transistor is of a second doping type which is opposite to the first doping type of the first input transistor of the amplifier.

    摘要翻译: 一种电子设备,包括具有至少第一掺杂类型的第一输入晶体管的放大器。 第一晶体管与通道耦合,作为放大器的输出与第一输入晶体管的控制栅极之间的反馈路径,其形成放大器的输入。 二极管耦合的第二晶体管与第一电流源和放大器的输出之间的通道耦合,其中第一晶体管的控制栅极耦合在第一电流源和二极管耦合的第二晶体管之间,第一晶体管为 与放大器的第一输入晶体管的第一掺杂类型相反的第二掺杂类型。

    ELECTRONIC DEVICE AND METHOD FOR KICKBACK NOISE REDUCTION OF SWITCHED CAPACITIVE LOADS AND METHOD OF OPERATING THE ELECTRONIC DEVICE
    4.
    发明申请
    ELECTRONIC DEVICE AND METHOD FOR KICKBACK NOISE REDUCTION OF SWITCHED CAPACITIVE LOADS AND METHOD OF OPERATING THE ELECTRONIC DEVICE 有权
    电子设备和用于开关电容负载的抑制噪声的方法和操作电子设备的方法

    公开(公告)号:US20120092055A1

    公开(公告)日:2012-04-19

    申请号:US13267661

    申请日:2011-10-06

    IPC分类号: H03L5/00

    摘要: An electronic device which includes a first stage having an input capacitance, a switch, a buffer and a second stage having an input sensitive to charge injection and/or voltage glitches. An input of the buffer and the input of the second stage are coupled together at a first node which is configured to be coupled to a voltage source for supplying a reference voltage to the input of the first stage having the input capacitance. In a first configuration of the switch, the switch is arranged to either connect the input of the first stage to the first node and to disconnect the input of the first stage from an output of the buffer. In a second configuration of the switch, to connect the input of the first stage to the output of the buffer and to disconnect the input of the first stage from the first node.

    摘要翻译: 一种电子设备,其包括具有输入电容的第一级,开关,缓冲器和具有对电荷注入和/或电压毛刺敏感的输入的第二级。 缓冲器的输入和第二级的输入在第一节点处耦合在一起,第一节点被配置为耦合到用于向具有输入电容的第一级的输入端提供参考电压的电压源。 在开关的第一配置中,开关被布置为将第一级的输入连接到第一节点,并且将第一级的输入与缓冲器的输出断开。 在交换机的第二配置中,将第一级的输入连接到缓冲器的输出并且将第一级的输入与第一个节点断开连接。

    RFID TRANSPONDER WITH PLL
    5.
    发明申请
    RFID TRANSPONDER WITH PLL 有权
    带有PLL的RFID TRANSPONDER

    公开(公告)号:US20090174592A1

    公开(公告)日:2009-07-09

    申请号:US12200521

    申请日:2008-08-28

    申请人: Ernst Muellner

    发明人: Ernst Muellner

    IPC分类号: G01S13/74

    CPC分类号: H04B1/00 G06K19/0723

    摘要: An RFID transponder comprises an antenna for receiving data in a downlink mode and transmitting data in an uplink mode, with a modulation stage for modulating uplink data and a demodulation stage for demodulating downlink data. A class C amplifier is provided, which has a resonant circuit, a plucking device coupled to the resonant circuit, and a controllable pulse width generator coupled to the plucking device. The controllable pulse width generator is adapted to periodically switch the plucking device on and off so as to maintain an oscillation of the resonant circuit. The transponder further comprises a phase locked loop configured to be locked to an oscillating signal received through the antenna and to be switched into a free running mode without being locked to the oscillating signal received through the antenna, thereby being adapted to output an independent internal clock signal for the RFID transponder.

    摘要翻译: RFID应答器包括用于以下行链路模式接收数据并以上行链路模式发送数据的天线,具有用于调制上行链路数据的调制级和用于解调下行链路数据的解调级。 提供了一种C类放大器,其具有谐振电路,耦合到谐振电路的拔除装置和耦合到拔除装置的可控脉冲宽度发生器。 可控脉冲宽度发生器适于周期性地接通和关闭拔除装置,以保持谐振电路的振荡。 应答器还包括锁相环,其配置为锁定到通过天线接收的振荡信号,并且被切换到自由运行模式而不被锁定到通过天线接收的振荡信号,从而适于输出独立的内部时钟 信号为RFID应答器。

    ECL-CMOS converter
    6.
    发明授权
    ECL-CMOS converter 失效
    ECL-CMOS转换器

    公开(公告)号:US5012137A

    公开(公告)日:1991-04-30

    申请号:US380593

    申请日:1989-07-17

    申请人: Ernst Muellner

    发明人: Ernst Muellner

    摘要: An ECL-CMOS converter composed of a voltage-to-current converter and of a current-to-voltage converter is interconnected according to the "mismatched amplifier" principle. At two inputs of the voltage-to-current converter, the ECL input voltages are converted into a current that can be taken at an output of the voltage-to-current converter. The current is subsequently amplified in a current-to-voltage converter to an output voltage that is available at an output of the current-to-voltage converter. The current-to-voltage converter is composed of a feedback inverter stage, as a result thereof the operating point at an input of the current-to-voltage converter is stabilized at about half of an operating voltage of the converter.

    摘要翻译: 根据“失配的放大器”原理,将由电压 - 电流转换器和电流 - 电压转换器组成的ECL-CMOS转换器互连。 在电压 - 电流转换器的两个输入端,ECL输入电压被转换成可以在电压 - 电流转换器的输出端获取的电流。 电流随后在电流 - 电压转换器中被放大到在电流 - 电压转换器的输出端可用的输出电压。 电流 - 电压转换器由反馈反相级组成,其结果是电流 - 电压转换器的输入处的工作点稳定在转换器工作电压的大约一半。

    RFID transponder and method for operating the same
    7.
    发明授权
    RFID transponder and method for operating the same 有权
    RFID应答器及其操作方法

    公开(公告)号:US08923791B2

    公开(公告)日:2014-12-30

    申请号:US13314576

    申请日:2011-12-08

    摘要: An RFID transponder having an analog front end receiver having an attenuator coupled to receive an RF-signal from an antenna and to attenuate the RF-signal, an amplifier having a fixed amplifier gain and being coupled to receive and to amplify the attenuated RF-signal and a control unit coupled to control a gain of the attenuator, wherein the control unit is configured to control the attenuator gain in response to a level of the amplified RF-signal, the control unit is configured to have a plurality of predetermined states causing the attenuator to increase (step-up) or to decrease (step-down), its gain by a predefined step size.

    摘要翻译: 一种具有模拟前端接收器的RFID应答器,其具有被耦合以从天线接收RF信号并衰减RF信号的衰减器,放大器具有固定的放大器增益并被耦合以接收和放大衰减的RF信号 以及控制单元,其耦合以控制所述衰减器的增益,其中所述控制单元被配置为响应于所述放大的RF信号的电平来控制所述衰减器增益,所述控制单元被配置为具有多个预定状态, 衰减器增加(升压)或降低(降压),其增益由预定步长决定。

    Electronic device and method for kickback noise reduction of switched capacitive loads and method of operating the electronic device
    8.
    发明授权
    Electronic device and method for kickback noise reduction of switched capacitive loads and method of operating the electronic device 有权
    用于开关容性负载的反冲降噪声的电子装置和方法以及操作电子装置的方法

    公开(公告)号:US08922267B2

    公开(公告)日:2014-12-30

    申请号:US13267661

    申请日:2011-10-06

    IPC分类号: H03K17/687 H03F3/72

    摘要: An electronic device which includes a first stage having an input capacitance, a switch, a buffer and a second stage having an input sensitive to charge injection and/or voltage glitches. An input of the buffer and the input of the second stage are coupled together at a first node which is configured to be coupled to a voltage source for supplying a reference voltage to the input of the first stage having the input capacitance. In a first configuration of the switch, the switch is arranged to either connect the input of the first stage to the first node and to disconnect the input of the first stage from an output of the buffer. In a second configuration of the switch, to connect the input of the first stage to the output of the buffer and to disconnect the input of the first stage from the first node.

    摘要翻译: 一种电子设备,其包括具有输入电容的第一级,开关,缓冲器和具有对电荷注入和/或电压毛刺敏感的输入的第二级。 缓冲器的输入和第二级的输入在第一节点处耦合在一起,第一节点被配置为耦合到用于向具有输入电容的第一级的输入端提供参考电压的电压源。 在开关的第一配置中,开关被布置为将第一级的输入连接到第一节点,并且将第一级的输入与缓冲器的输出断开。 在交换机的第二配置中,将第一级的输入连接到缓冲器的输出并且将第一级的输入与第一个节点断开连接。

    RFID transponder with improved wake pattern detection and method
    9.
    发明授权
    RFID transponder with improved wake pattern detection and method 有权
    RFID转发器具有改进的尾迹模式检测和方法

    公开(公告)号:US08629763B2

    公开(公告)日:2014-01-14

    申请号:US12629694

    申请日:2009-12-02

    IPC分类号: H04Q5/22

    摘要: An RFID transponder is provided which includes an automatic gain control (AGC) stage for amplifying a radio frequency (RF) signal and for providing an amplified RF signal. The AGC stage has a control signal indicating an increase of the amplitude of the RF signal. A demodulator is coupled to receive the amplified RF signal for demodulating the amplified RF signal. The demodulator provides a data signal. A burst detector is coupled to receive the control signal of the AGC stage and adapted to provide a start signal in response to a change of the control signal. A wake pattern detector is coupled to receive the data signal and the start signal. The wake pattern detector is adapted to detect a predefined wake pattern in the data signal after having received the start signal and to issue a wake signal if the predefined wake pattern is detected for switching the RFID transponder from a first operating mode into a second operating mode having higher power consumption than the first operating mode.

    摘要翻译: 提供一种RFID应答器,其包括用于放大射频(RF)信号和提供放大的RF信号的自动增益控制(AGC)级。 AGC级具有指示RF信号的幅度增加的控制信号。 解调器被耦合以接收放大的RF信号以解调放大的RF信号。 解调器提供数据信号。 脉冲串检测器被耦合以接收AGC级的控制信号,并且适于响应于控制信号的改变来提供启动信号。 耦合读取模式检测器以接收数据信号和起始信号。 唤醒图案检测器适于在已经接收到起始信号之后检测数据信号中的预定义的唤醒图案,并且如果检测到预定的唤醒图案以将RFID应答器从第一操作模式切换到第二操作模式,则发出唤醒信号 具有比第一操作模式更高的功率消耗。

    Adder cell having a sum part and a carry part
    10.
    发明授权
    Adder cell having a sum part and a carry part 失效
    加法器单元具有和部分和进位部分

    公开(公告)号:US4918640A

    公开(公告)日:1990-04-17

    申请号:US296070

    申请日:1989-01-12

    摘要: An adder cell having a sum part and a carry part, whereby the sum part and the carry part each contain differential amplifiers having exclusively bipolar or ECL technology as well as differential amplifiers having mixed bipolar MOS transistors. The processing speed can be considerably increased with such an arrangement in comparison to exclusive CMOS adder cells. Additionally, the adder cell carries out a level conversion of CMOS input levels to ECL output levels, so that CMOS levels between 0 and 5 volts can be received at the first four inputs (E1, E2, E3, E4) and ECL boosts in the millivolt range can be taken at the sum outputs (S, S) or, at the carry outputs (CO, CO).

    摘要翻译: 具有和部分和进位部分的加法器单元,其中和部分和进位部分各自包含具有双极或ECL技术的差分放大器以及具有混合双极MOS晶体管的差分放大器。 与专用CMOS加法器单元相比,这种布置可以显着提高处理速度。 另外,加法器单元执行CMOS输入电平到ECL输出电平的电平转换,使得可以在前四个输入(E1,E2,E3,E4)处接收0到5伏之间的CMOS电平,并在 毫伏范围可以在和输出(S,&upbar&S)或进位输出(CO,&upbar&C)上进行。