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1.发明申请PHASE-CHANGE MEMORY CELL AND METHOD OF FABRICATING THE PHASE-CHANGE MEMORY CELL 有权相变存储器单元和相变存储器单元的制作方法公开(公告)号：US20090072214A1
公开(公告)日：2009-03-19
申请号：US12276905
申请日：2008-11-24
CPC分类号： G11C13/0069 , G11C13/0004 , G11C2213/52 , H01L45/06 , H01L45/1233 , H01L45/1286 , H01L45/144 , H01L45/1625 , H01L45/1666
摘要： A memory cell (and method of fabricating the memory cell) includes a stencil layer having a first opening, a phase-change material layer formed on a first electrode layer, and an electrically conductive layer formed on the first electrode layer, the electrically conductive layer having a pillar-shaped portion which is formed on the phase-change material layer and fills the first opening.
摘要翻译： 存储单元（及其制造方法）包括具有第一开口的模版层，形成在第一电极层上的相变材料层和形成在第一电极层上的导电层，导电层 具有形成在相变材料层上并填充第一开口的柱状部分。
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公开(公告)号：US20080068065A1
公开(公告)日：2008-03-20
申请号：US11926031
申请日：2007-10-28
IPC分类号： H03K17/00
CPC分类号： H01L27/1203 , G11C16/08 , H01L21/84 , H01L27/115 , Y10S977/936 , Y10S977/938 , Y10S977/958
摘要： An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.
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公开(公告)号：US20060244058A1
公开(公告)日：2006-11-02
申请号：US11117276
申请日：2005-04-27
IPC分类号： H01L29/76
CPC分类号： H01L27/1203 , G11C16/08 , H01L21/84 , H01L27/115 , Y10S977/936 , Y10S977/938 , Y10S977/958
摘要： An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.
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4.发明申请Memory and logic devices using electronically scannable multiplexing devices 有权使用电子可扫描多路复用器件的存储器和逻辑器件公开(公告)号：US20060244047A1
公开(公告)日：2006-11-02
申请号：US11116700
申请日：2005-04-27
IPC分类号： H01L29/788
CPC分类号： H01L27/115 , G11C16/08 , H01L21/84 , H01L27/1203
摘要： A memory device or a logic device that uses an electronically scannable multiplexing device capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.
摘要翻译： 一种存储器件或逻辑器件，其使用能够寻址易失性或非易失性存储器单元内的多个位的电子扫描复用器件。 多路复用装置产生具有两个相对形成的耗尽区的电子扫描导电通道。 每个耗尽区的耗尽宽度由施加到多路复用器件每端的相应控制栅极的电压控制。 目前的多位寻址技术允许例如在单个节点上访问或寻址10到100位的数据。 本发明还可用于构建可编程纳米尺度逻辑阵列或用于随机访问纳米级传感器阵列。
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5.发明申请Phase-change memory cell and method of fabricating the phase-change memory cell 失效相变存储单元和相变存储单元的制造方法公开(公告)号：US20050227177A1
公开(公告)日：2005-10-13
申请号：US11150184
申请日：2005-06-13
IPC分类号： G11B7/24 , H01L27/095 , H01L29/06 , H01L29/47 , H01L29/812 , H01L39/00 , H01L45/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C2213/52 , H01L45/06 , H01L45/1233 , H01L45/1286 , H01L45/144 , H01L45/1625 , H01L45/1666
摘要： A memory cell and method of fabricating the memory cell includes an insulating layer formed on a first electrode layer, the insulating layer having a first opening, a stencil layer formed on the insulating layer, and having a second opening formed in an area of the first opening, a phase-change material layer formed on a surface of the first electrode layer in the first opening, and an electrically conductive layer including a first portion formed on the stencil layer and defining a second electrode layer and a second portion formed on the phase-change material layer.
摘要翻译： 存储单元和存储单元的制造方法包括形成在第一电极层上的绝缘层，所述绝缘层具有第一开口，形成在所述绝缘层上的模板层，并且具有第二开口，所述第二开口形成在所述第一开口 在第一开口中形成在第一电极层的表面上的相变材料层和导电层，导电层包括形成在模板层上的第一部分，并且限定形成在相位上的第二电极层和第二部分 交换材料层。
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公开(公告)号：US20060269047A1
公开(公告)日：2006-11-30
申请号：US11497252
申请日：2006-08-02
CPC分类号： H01J35/08 , G21K7/00 , H01J2235/083 , H01J2235/086
摘要： A device for generating an x-ray point source includes a target, and an electron source for producing electrons which intersect with the target to generate an x-ray point source having a size which is confined by a dimension of the target.
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7.发明授权Phase-change memory cell and method of fabricating the phase-change memory cell 有权相变存储单元和相变存储单元的制造方法公开(公告)号：US07910910B2
公开(公告)日：2011-03-22
申请号：US12276905
申请日：2008-11-24
CPC分类号： G11C13/0069 , G11C13/0004 , G11C2213/52 , H01L45/06 , H01L45/1233 , H01L45/1286 , H01L45/144 , H01L45/1625 , H01L45/1666
摘要： A memory cell (and method of fabricating the memory cell) includes a stencil layer having a first opening, a phase-change material layer formed on a first electrode layer, and an electrically conductive layer formed on the first electrode layer, the electrically conductive layer having a pillar-shaped portion which is formed on the phase-change material layer and fills the first opening.
摘要翻译： 存储单元（及其制造方法）包括具有第一开口的模版层，形成在第一电极层上的相变材料层和形成在第一电极层上的导电层，导电层 具有形成在相变材料层上并填充第一开口的柱状部分。
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公开(公告)号：US20050265072A1
公开(公告)日：2005-12-01
申请号：US10856547
申请日：2004-05-28
申请人： Mark Hart , Chung Lam , Christie Marrian , Gary McClelland , Simone Raoux , Charles Rettner , Hemantha Wickramasinghe
发明人： Mark Hart , Chung Lam , Christie Marrian , Gary McClelland , Simone Raoux , Charles Rettner , Hemantha Wickramasinghe
CPC分类号： H01L27/24 , G11C13/0004 , G11C13/0069 , G11C2013/008 , G11C2213/72 , H01L27/2463 , H01L45/06 , H01L45/124 , H01L45/1286 , H01L45/144 , H01L45/1666
摘要： A method and structure for a memory cell comprising a phase change material; a heating element in thermal contact with the phase change material, wherein the heating element is adapted to induce a phase change in the phase change material; and electrical lines configured to pass current through the heating element, wherein the phase change material and the heating element are arranged in a configuration other than being electrically connected in series. The memory cell further comprises a sensing element in thermal contact with the phase change material, wherein the sensing element is adapted to detect a change in at least one physical property of the phase change material, wherein the sensing element is adapted to detect a change in a thermal conductivity of the phase change material.
摘要翻译： 一种包括相变材料的存储单元的方法和结构; 与所述相变材料热接触的加热元件，其中所述加热元件适于引起所述相变材料的相变; 以及配置为使电流通过所述加热元件的电线，其中所述相变材料和所述加热元件被布置成不是串联电连接的构造。 存储单元还包括与相变材料热接触的感测元件，其中感测元件适于检测相变材料的至少一个物理特性的变化，其中感测元件适于检测相变材料的变化 相变材料的导热性。
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9.发明申请Non-planarized, self-aligned, non-volatile phase-change memory array and method of formation 有权非平面化，自对准，非易失性相变存储器阵列和形成方法公开(公告)号：US20050242338A1
公开(公告)日：2005-11-03
申请号：US10835814
申请日：2004-04-30
CPC分类号： H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： A method for fabrication and a structure of a self-aligned (crosspoint) memory device comprises lines (wires) in a first direction and in a second direction. The wires in the first direction are formed using a hard mask material that is resistant to the pre-selected etch processes used for creation of the lines in both the first and the second direction. Consequently, the hard mask material for the lines in the first direction form part of the memory stack.
摘要翻译： 用于制造的方法和自对准（交叉点）存储器件的结构包括在第一方向和第二方向上的线（线）。 使用硬掩模材料形成第一方向上的导线，该硬掩模材料抵抗用于在第一和第二方向上产生线的预选蚀刻工艺。 因此，用于沿第一方向的线的硬掩模材料形成存储器堆叠的一部分。
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公开(公告)号：US20060172283A1
公开(公告)日：2006-08-03
申请号：US11047250
申请日：2005-01-31
CPC分类号： G01N27/44791 , B82Y15/00
摘要： A method and apparatus for separating molecules comprises placing different kinds of molecular species onto a probe; and introducing an electric field between the probe and a surface in proximity with the probe so that the different kinds of molecular species may be separated, wherein the different kinds of molecular species have differing mobilities, and wherein the different kinds of molecular species may be separated according to their differing mobilities, such that molecular species that have different mobilities migrate along the probe at different speeds towards the surface. The molecular species may comprise molecules. Alternatively, the molecular species may comprise molecular assemblies, wherein the molecular assemblies may comprise at least one of cells, bacteria, and viruses.
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