公开(公告)号：US20160141246A1

公开(公告)日：2016-05-19

申请号：US14924217

申请日：2015-10-27

Applicant: Jin-Nam Kim ,  Tsukasa Matsuda ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Nae-In Lee ,  Jong-Jin Lee

Inventor： Jin-Nam Kim ,  Tsukasa Matsuda ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Nae-In Lee ,  Jong-Jin Lee

IPC: H01L23/522

CPC classification number: H01L23/485 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76882 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53276 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first interlayer insulating layer including a first trench, on a substrate a first liner layer formed along a side wall and a bottom surface of the first trench and including noble metal, the noble metal belonging to one of a fifth period and a sixth period of a periodic chart that follows numbering of International Union of Pure and Applied Chemistry (IUPAC) and belonging to one of eighth to tenth groups of the periodic chart, and a first metal wire filling the first trench on the first liner layer, a top surface of the first metal wire having a convex shape toward a bottom surface of the first trench.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括：第一层间绝缘层，包括第一沟槽，在衬底上，沿着侧壁形成的第一衬里层和第一沟槽的底表面，并且包括贵金属，贵金属属于第五周期之一， 是国际纯粹和应用化学联合会（IUPAC）编号之后的第六周期，属于周期图的第八至第十组之一，以及填充第一衬里层上的第一沟槽的第一金属线， 所述第一金属线的顶表面朝向所述第一沟槽的底表面具有凸形形状。

公开(公告)号：US20100317132A1

公开(公告)日：2010-12-16

申请号：US12778588

申请日：2010-05-12

Applicant: John A. Rogers ,  Ralph Nuzzo ,  Hoon-sik Kim ,  Eric Brueckner ,  Sang Il Park ,  Rak Hwan Kim

Inventor： John A. Rogers ,  Ralph Nuzzo ,  Hoon-sik Kim ,  Eric Brueckner ,  Sang Il Park ,  Rak Hwan Kim

IPC: H01L21/56 ,  H01L21/50 ,  H01L33/52 ,  H01L21/48 ,  B29D11/00

CPC classification number: H01L25/0753 ,  H01L21/6835 ,  H01L24/83 ,  H01L24/95 ,  H01L25/50 ,  H01L33/0079 ,  H01L33/32 ,  H01L33/486 ,  H01L33/507 ,  H01L33/54 ,  H01L33/62 ,  H01L2221/68322 ,  H01L2221/6835 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68386 ,  H01L2224/8312 ,  H01L2224/83868 ,  H01L2224/83871 ,  H01L2224/83874 ,  H01L2224/95085 ,  H01L2924/01322 ,  H01L2924/05432 ,  H01L2924/06 ,  H01L2924/12033 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2933/0041 ,  H01L2933/005 ,  Y10S438/977 ,  H01L2924/00

Abstract: Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

Abstract translation: 这里描述了用于制造，组装和布置电子设备的可打印结构和方法。 本文描述的许多方法对于组装电子器件是有用的，其中一个或多个器件部件被嵌入在嵌入过程中被图案化的聚合物中，其中沟槽用于器件部件之间的电互连。 本文描述的一些方法可用于通过印刷方法组装电子装置，例如通过干式转印接触印刷方法。 本文还描述了GaN发光二极管以及用于制造和布置GaN发光二极管的方法，例如用于显示器或照明系统。

公开(公告)号：US20060281289A1

公开(公告)日：2006-12-14

申请号：US11446981

申请日：2006-06-06

Applicant: Young-Cheon Kim ,  Chul Hwangbo ,  Rak-Hwan Kim ,  Hyeon-Deok Lee ,  In-Sun Park ,  Ji-Soon Park

Inventor： Young-Cheon Kim ,  Chul Hwangbo ,  Rak-Hwan Kim ,  Hyeon-Deok Lee ,  In-Sun Park ,  Ji-Soon Park

IPC: H01L21/4763

CPC classification number: H01L21/26513 ,  H01L21/28061 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4933 ,  H01L29/6659 ,  H01L29/7833

Abstract: In a method of forming a polycide layer and method of manufacturing a semiconductor device having the polycide layer, the method may include forming a preliminary polysilicon layer doped with first type impurities on a substrate having a first region and a second region, implanting second type of impurities into a portion of the preliminary polysilicon layer on the second region, heat treating the preliminary polysilicon layer to electrically activate the impurities, removing a portion of an upper surface of the heat treated preliminary polysilicon layer to obtain a polysilicon layer, forming a metal silicide layer on the polysilicon layer, and patterning the polysilicon layer and the metal silicide layer to form a first type gate electrode on the first region and to form a second type gate electrode on the second region.

Abstract translation: 在形成多晶硅化合物层的方法和制造具有多晶硅化物层的半导体器件的方法中，该方法可以包括在具有第一区域和第二区域的衬底上形成掺杂有第一类型杂质的初步多晶硅层， 杂质进入第二区域的初步多晶硅层的一部分，热处理初步多晶硅层以电激活杂质，去除热处理的初步多晶硅层的上表面的一部分以获得多晶硅层，形成金属硅化物 并且在所述第一区域上形成所述多晶硅层和所述金属硅化物层以形成第一类型的栅电极，并在所述第二区域上形成第二类型的栅电极。

公开(公告)号：US20060099760A1

公开(公告)日：2006-05-11

申请号：US11266520

申请日：2005-11-03

Applicant: Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

Inventor： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

IPC: H01L21/8242

CPC classification number: H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract translation: 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模压氧化层，选择性地去除模制件的部分 在接触塞上方形成凹部，在凹部的底面和侧面形成钛层，在钛层上形成氮化钛层，在氮化钛层上形成氮化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

公开(公告)号：US20060014385A1

公开(公告)日：2006-01-19

申请号：US11173771

申请日：2005-06-30

Applicant: Rak-Hwan Kim ,  Hyun-Seok Lim ,  Young-Joo Cho ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee

Inventor： Rak-Hwan Kim ,  Hyun-Seok Lim ,  Young-Joo Cho ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee

IPC: H01L21/20 ,  H01L21/44

CPC classification number: C23C16/45529 ,  C23C16/34 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75 ,  H01L28/91

Abstract: A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas at a predetermined flow ratio and depositing a second titanium nitride layer on the first titanium nitride layer using a chemical vapor deposition process performed at a second temperature that is greater than the first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas.

Abstract translation: 一种制造存储电容器的方法包括使用化学气相沉积技术或在第一温度下用氯化钛（TiCl 4）的反应气体进行的原子层沉积技术在电介质层上沉积第一氮化钛层 >）气体和氨（NH 3）气体，并且在第一氮化钛层上沉积第二氮化钛层，使用在大于 第一温度与氯化钛（TiCl 4 N 3）气体和氨（NH 3）3气体的反应气体反应。

公开(公告)号：US08124978B2

公开(公告)日：2012-02-28

申请号：US12659553

申请日：2010-03-12

Applicant: Hyun-Young Kim ,  Rak-Hwan Kim ,  Young-Joo Cho ,  Won-sik Shin

Inventor： Hyun-Young Kim ,  Rak-Hwan Kim ,  Young-Joo Cho ,  Won-sik Shin

IPC: H01L29/12 ,  H01L29/786 ,  H01L27/108 ,  H01L29/94

CPC classification number: H01L28/91 ,  H01L27/0207 ,  H01L27/10852

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract translation: 电容器及其制造方法包括绝缘中间层，下电极，保护结构，电介质层和上电极。 绝缘中间层可以包括形成在基板上的导电图案。 下电极可以电连接到导电图案。 保护结构可以形成在圆柱形下电极的外侧壁上和绝缘中间层上。

公开(公告)号：US20100188795A1

公开(公告)日：2010-07-29

申请号：US12659553

申请日：2010-03-12

Applicant: Hyun-Young Kim ,  Rak-Hwan Kim ,  Young-Joo Cho ,  Won-sik Shin

Inventor： Hyun-Young Kim ,  Rak-Hwan Kim ,  Young-Joo Cho ,  Won-sik Shin

IPC: H01G4/002

CPC classification number: H01L28/91 ,  H01L27/0207 ,  H01L27/10852

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract translation: 电容器及其制造方法包括绝缘中间层，下电极，保护结构，电介质层和上电极。 绝缘中间层可以包括形成在基板上的导电图案。 下电极可以电连接到导电图案。 保护结构可以形成在圆柱形下电极的外侧壁上和绝缘中间层上。

公开(公告)号：US07709342B2

公开(公告)日：2010-05-04

申请号：US11254851

申请日：2005-10-21

Applicant: Hyun-Young Kim ,  Rak-Hwan Kim ,  Young-Joo Cho ,  Won-sik Shin

Inventor： Hyun-Young Kim ,  Rak-Hwan Kim ,  Young-Joo Cho ,  Won-sik Shin

IPC: H01L21/20

CPC classification number: H01L28/91 ,  H01L27/0207 ,  H01L27/10852

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

公开(公告)号：US07541282B2

公开(公告)日：2009-06-02

申请号：US11084576

申请日：2005-03-18

Applicant: Sung-ho Han ,  Rak-hwan Kim ,  Kyung-in Choi ,  Sang-woo Lee ,  Gil-heyun Choi

Inventor： Sung-ho Han ,  Rak-hwan Kim ,  Kyung-in Choi ,  Sang-woo Lee ,  Gil-heyun Choi

IPC: H01L21/4763

CPC classification number: H01L21/76846 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76876 ,  H01L21/76877 ,  H01L2221/1089

Abstract: A metal layer can be formed in an integrated circuit by forming a metal-nitride layer in a recess including a first concentration of nitrogen in the metal-nitride layer at a bottom of the recess that is less than a second concentration of nitrogen in the metal-nitride layer proximate an opening of the recess. A metal layer can be formed on the metal-nitride layer including in the recess.

Abstract translation: 可以在集成电路中形成金属层，在金属氮化物层的凹部内的金属氮化物层中形成氮化物的第一浓度，该金属氮化物层的厚度小于金属中的第二氮浓度 邻近凹部的开口的氮化物层。 可以在包括在凹部中的金属氮化物层上形成金属层。

公开(公告)号：US07452783B2

公开(公告)日：2008-11-18

申请号：US11286316

申请日：2005-11-23

Applicant: Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

Inventor： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

IPC: H01L21/20

CPC classification number: H01L28/90 ,  H01L27/0207 ,  H01L27/10852 ,  H01L28/75

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract translation: 在具有高介电常数的电容器中，电容器包括圆柱形下电极，电介质层和上电极。 在作为电介质层的下电极的内表面，顶面和外表面上形成金属氧化物层。 第一子电极沿着下电极的轮廓在电介质层的表面上形成，并且第二子电极连续形成在与下电极的顶表面对应的第一子电极上，因此开口部分 的下部电极被第二子电极覆盖。 第一和第二子电极分别包括施加第一和第二应力的第一和第二金属氮化物层。 第一和第二个应力的方向彼此相反。 因此，在具有高介电常数的上电极中破裂最小化，从而减少电流泄漏。