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    PLASMA ETCHING METHOD, PLASMA ETCHING APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM
    3.
    发明申请
    PLASMA ETCHING METHOD, PLASMA ETCHING APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM 有权
    等离子体蚀刻方法，等离子体蚀刻装置和计算机可读存储介质

    公开(公告)号：US20110250761A1

    公开(公告)日：2011-10-13

    申请号：US13045988

    申请日：2011-03-11

    申请人： Sungtae LEE ,  Masahiro Ogasawara ,  Junichi Sasaki ,  Naohito Yanagida

    发明人： Sungtae LEE ,  Masahiro Ogasawara ,  Junichi Sasaki ,  Naohito Yanagida

    IPC分类号： H01L21/3065

    CPC分类号： H01L21/31144 ,  H01J37/32091

    摘要： A plasma etching method is provided to perform a plasma etching on a silicon oxide film or a silicon nitride film formed below an amorphous carbon film by using a pattern of the amorphous carbon film as a final mask in a multilayer mask including a photoresist layer having a predetermined pattern, an organic bottom anti-reflection coating (BARC) film formed below the photoresist layer, an SiON film formed below the BARC film, and the amorphous carbon film formed below the SiON film. An initial mask used at the time when the plasma etching of the silicon oxide film or the silicon nitride film is started is under a state in which the SiON film remains on the amorphous carbon film and a ratio of a film thickness of the amorphous carbon film to a film thickness of the residual SiON film is smaller than or equal to about 14.

    摘要翻译： 提供了一种等离子体蚀刻方法，用于通过在非晶碳膜的图案作为最终掩模的非晶碳膜上形成的氧化硅膜或氮化硅膜上进行等离子体蚀刻，所述多层掩模包括具有 预定图案，在光致抗蚀剂层下形成的有机底部防反射涂层（BARC）膜，在BARC膜下面形成的SiON膜和形成在SiON膜下面的无定形碳膜。 在氧化硅膜或氮化硅膜的等离子体蚀刻开始时使用的初始掩模是在无定形碳膜上残留SiON膜的状态和无定形碳膜的膜厚比 残留SiON膜的膜厚小于或等于约14。

    OPTICAL CONNECTION STRUCTURE BETWEEN OPTICAL BACKPLANE AND CIRCUIT SUBSTRATE
    5.
    发明申请
    OPTICAL CONNECTION STRUCTURE BETWEEN OPTICAL BACKPLANE AND CIRCUIT SUBSTRATE 有权
    光学背板和电路基板之间的光学连接结构

    公开(公告)号：US20090310922A1

    公开(公告)日：2009-12-17

    申请号：US12534622

    申请日：2009-08-03

    申请人： Junichi SASAKI

    发明人： Junichi SASAKI

    IPC分类号： G02B6/36 ,  G02B6/38

    CPC分类号： G02B6/3885 ,  G02B6/3897 ,  G02B6/43

    摘要： Information processing equipment includes a photoelectric conversion module disposed on a circuit substrate, a first optical connector connected to the photoelectric conversion module through a plurality of first optical fibers and disposed to an edge portion of the circuit substrate, and a second optical connector disposed on an optical backplane and optically connected to the first optical connector. The disposing direction of the optical fibers in the photoelectric conversion module is in nonparallel with the main surface of the circuit substrate and the disposing direction of the optical fibers in the first optical connector and the disposing direction of the optical fibers in the second optical connector are in nonparallel with the main surface of the circuit substrate.

    摘要翻译： 信息处理设备包括设置在电路基板上的光电转换模块，通过多个第一光纤连接到光电转换模块并且设置在电路基板的边缘部分的第一光学连接器，以及设置在电路基板上的第二光学连接器 光学背板并且光学连接到第一光学连接器。 光电转换模块中的光纤的布置方向与电路基板的主表面不平行，第一光连接器中的光纤的布置方向和第二光连接器中的光纤的布置方向为 与电路基板的主表面非平行。

    COMMUNICATION APPARATUS FOR COMMUNICATION BETWEEN HOUSING SLOTS, WIRING CHANGE UNIT AND WIRING METHOD
    7.
    发明申请
    COMMUNICATION APPARATUS FOR COMMUNICATION BETWEEN HOUSING SLOTS, WIRING CHANGE UNIT AND WIRING METHOD 审中-公开
    通信设备，用于通信接口，接线改变单元和接线方式

    公开(公告)号：US20090148116A1

    公开(公告)日：2009-06-11

    申请号：US11719649

    申请日：2005-11-18

    申请人： Shigeyuki Yanagimachi ,  Takashi Yoshikawa ,  Junichi Sasaki ,  Kazuhiko Kurata

    发明人： Shigeyuki Yanagimachi ,  Takashi Yoshikawa ,  Junichi Sasaki ,  Kazuhiko Kurata

    IPC分类号： G02B6/00

    CPC分类号： H05K7/1424 ,  G02B6/43 ,  H05K7/1447

    摘要： An intra-housing optical communication system includes card slots 61 to 64 and at least a concentrate slot and conducts the optical communication between the slots, wherein the optical wires between the card slots are connected by using an optical fiber sheet or the like to simplify the wiring and reduce the size of the housing. The concentrate slots include an optical wiring change unit 6 for changing the form of connection between the card slots, thereby making it possible to easily change the form of connection to the desired shape (mesh, ring, etc.). Also, the optical terminals of the optical connectors are shared by a plurality of the slots and thus made available for use among the optical connectors.

    摘要翻译： 一种室内光通信系统包括卡槽61至64和至少一个集中槽，并且在狭槽之间进行光通信，其中通过使用光纤片等将卡槽之间的光线连接，以简化 接线并减小外壳尺寸。 浓缩槽包括用于改变卡槽之间的连接形式的光布线改变单元6，从而可以容易地改变到所需形状（网格，环等）的连接形式。 此外，光连接器的光端子由多个槽共用，从而可在光连接器之间使用。

    OPTICAL COMMUNICATION MODULE AND OPTICAL SIGNAL TRANSMISSION METHOD
    8.
    发明申请
    OPTICAL COMMUNICATION MODULE AND OPTICAL SIGNAL TRANSMISSION METHOD 审中-公开
    光通信模块和光信号传输方法

    公开(公告)号：US20090052909A1

    公开(公告)日：2009-02-26

    申请号：US11814462

    申请日：2006-01-21

    申请人： Tomoyuki Hino ,  Kazuhiko Kurata ,  Yutaka Urino ,  Ichirou Ogura ,  Junichi Sasaki ,  Youichi Hashimoto

    发明人： Tomoyuki Hino ,  Kazuhiko Kurata ,  Yutaka Urino ,  Ichirou Ogura ,  Junichi Sasaki ,  Youichi Hashimoto

    IPC分类号： G02B6/28 ,  H04B10/12

    CPC分类号： G02B6/3897 ,  G02B6/43

    摘要： One or more one-dimensional array-shaped photoelectric conversion modules 302 are mounted on a board 301. A one-dimensional array-shaped light receiving/emitting element 303 is mounted in each of the one-dimensional array-shaped photoelectric conversion modules 302. Further, the one-dimensional array-shaped photoelectric conversion modules 302 are mechanically and optically connected to a flexible fiber sheet 306 through an optical connector 305. As parallel transmission paths 306 from the one-dimensional array-shaped photoelectric conversion modules 302 approach an end of a board 301, they are laminated with each other and connected to a two-dimensional array-shaped optical connector 307 at an end of the board. Further, a wavelength multiplexer/demultiplexer is connected to the optical connector.

    摘要翻译： 一个或多个一维阵列状光电转换模块302安装在板301上。一维阵列状光接收/发射元件303安装在一维阵列状光电转换模块302的每一个中。 此外，一维阵列状光电转换模块302通过光连接器305机械地和光学地连接到柔性纤维片材306上。由于一维阵列状光电转换模块302的平行传输路径306接近尾端 板301彼此层叠并连接到板的一端的二维阵列状光连接器307。 此外，波长多路复用器/解复用器连接到光学连接器。

    Semiconductor memory having an error correction function
    10.
    发明授权
    Semiconductor memory having an error correction function 有权
    具有纠错功能的半导体存储器

    公开(公告)号：US07212453B2

    公开(公告)日：2007-05-01

    申请号：US11155731

    申请日：2005-06-20

    申请人： Akira Kikutake ,  Yasuhiro Onishi ,  Kuninori Kawabata ,  Junichi Sasaki ,  Toshiya Miyo

    发明人： Akira Kikutake ,  Yasuhiro Onishi ,  Kuninori Kawabata ,  Junichi Sasaki ,  Toshiya Miyo

    IPC分类号： G11C29/00

    CPC分类号： G11C29/24 ,  G06F11/1032 ,  G11C11/401 ,  G11C29/50016 ,  G11C29/52 ,  G11C2029/0409

    摘要： Regular data inputted/outputted to/from external terminals is read/written to/from a regular cell array, and parity data is read/written from/to a parity cell array. Since the parity data is generated by a parity generation circuit, it is difficult to write a desired pattern to the parity cell array. The regular data and the parity data are exchanged with each other by a switch circuit, so that the regular data can be written to the parity cell array and the parity data can be written to the regular cell array. This enables the write of desired data to the parity cell array. A test of the parity data can be easily conducted. In particular, a leakage test or the like between memory cells can be easily conducted.

    摘要翻译： 向/从外部端子输入/输出的常规数据被读取/写入常规单元阵列，并且从奇偶校验单元阵列读取/写入奇偶校验数据。 由于奇偶校验数据由奇偶产生电路产生，因此难以将奇偶校验单元阵列所需的模式写入。 常规数据和奇偶校验数据通过开关电路彼此交换，使得常规数据可以写入奇偶校验单元阵列，并且奇偶校验数据可以写入正常单元阵列。 这使得能够将所需数据写入奇偶校验单元阵列。 可以容易地进行奇偶校验数据的测试。 特别地，可以容易地进行存储单元之间的泄漏测试等。