公开(公告)号：US09530618B2

公开(公告)日：2016-12-27

申请号：US13543701

申请日：2012-07-06

Applicant: Manfred Engelhardt

Inventor： Manfred Engelhardt

IPC: C23C16/00 ,  H01J37/32 ,  H01L21/683

CPC classification number: H01L21/67069 ,  H01J37/32091 ,  H01J37/32165 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32724 ,  H01J2237/332 ,  H01J2237/3341 ,  H01L21/6831 ,  Y10T279/21

Abstract: A chuck, a system including a chuck and a method for making a semiconductor device are disclosed. In one embodiment the chuck includes a first conductive region configured to be capacitively coupled to a first RF power generator, a second conductive region configured to be capacitively coupled to a second RF power generator and an insulation region that electrically insulates the first conductive region from the second conductive region.

Abstract translation: 公开了一种卡盘，包括卡盘的系统和制造半导体器件的方法。 在一个实施例中，卡盘包括被配置为电容耦合到第一RF功率发生器的第一导电区域，被配置为电容耦合到第二RF功率发生器的第二导电区域和将第一导电区域与 第二导电区域。

公开(公告)号：US20130328195A1

公开(公告)日：2013-12-12

申请号：US13492976

申请日：2012-06-11

Applicant: Manfred Engelhardt ,  Martin Zgaga ,  Karl Adolf Mayer ,  Gudrun Stranzl

Inventor： Manfred Engelhardt ,  Martin Zgaga ,  Karl Adolf Mayer ,  Gudrun Stranzl

IPC: H01L21/78 ,  H01L21/28 ,  H01L23/48

CPC classification number: H01L21/78 ,  H01L21/3063 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/6835 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The various aspects comprise methods and devices for processing a wafer.An aspect of this disclosure includes a wafer. The wafer comprises a plurality of die regions; a plurality of kerf regions between the plurality of die regions; and a metallization area on the plurality of die regions.

Abstract translation: 各个方面包括用于处理晶片的方法和装置。 本公开的一个方面包括晶片。 晶片包括多个管芯区域; 在所述多个管芯区域之间的多个切口区域; 以及多个管芯区域上的金属化区域。

公开(公告)号：US08575026B2

公开(公告)日：2013-11-05

申请号：US13288054

申请日：2011-11-03

Applicant: Manfred Engelhardt

Inventor： Manfred Engelhardt

IPC: H01L21/44

CPC classification number: H01L21/28506 ,  H01L21/3086 ,  H01L21/78

Abstract: One or more embodiments may include a method of making a semiconductor structure, comprising: forming a first opening partially through a semiconductor substrate; forming a first dielectric layer over a sidewall surface of the first opening; and forming a second opening partially through a semiconductor substrate, the second opening being below the first opening.

Abstract translation: 一个或多个实施例可以包括制造半导体结构的方法，包括：部分地通过半导体衬底形成第一开口; 在所述第一开口的侧壁表面上形成第一电介质层; 并且部分地通过半导体衬底形成第二开口，所述第二开口位于所述第一开口的下方。

公开(公告)号：US20130115757A1

公开(公告)日：2013-05-09

申请号：US13290197

申请日：2011-11-07

Applicant: Manfred Engelhardt ,  Petra Fischer

Inventor： Manfred Engelhardt ,  Petra Fischer

IPC: H01L21/78 ,  C23F1/08

CPC classification number: H01L21/306 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/78 ,  H01L29/1608

Abstract: A method for separating a plurality of dies is provided, the method including: defining one or more portions to be removed from a carrier including a plurality of dies by chemically changing the properties of the one or more portions to be removed located between the dies; performing a front-end-of-line FEOL process on at least one die to form at least one semiconductor device; and selectively removing the one or more portions of the carrier whose properties were chemically changed for separating the dies along the removed one or more portions.

Abstract translation: 提供了一种用于分离多个模具的方法，所述方法包括：通过化学改变位于模具之间的要移除的一个或多个部分的特性来限定从包括多个模具的载体中去除的一个或多个部分; 在至少一个管芯上执行前端FEOL处理以形成至少一个半导体器件; 并且选择性地除去其性质被化学改变的载体的一个或多个部分，以沿着去除的一个或多个部分分离模具。

公开(公告)号：US20130115755A1

公开(公告)日：2013-05-09

申请号：US13359548

申请日：2012-01-27

Applicant: Manfred Engelhardt ,  Petra Fischer

Inventor： Manfred Engelhardt ,  Petra Fischer

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/3043 ,  H01L21/306 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/322 ,  H01L21/6835 ,  H01L21/6836 ,  H01L29/1608 ,  H01L2221/68327

Abstract: A method for separating semiconductor die includes forming a porous region on a semiconductor wafer and separating the die at the porous region using mechanical or other means.

公开(公告)号：US20120322267A1

公开(公告)日：2012-12-20

申请号：US13163792

申请日：2011-06-20

Applicant: Manfred Engelhardt

Inventor： Manfred Engelhardt

IPC: H01L21/311

CPC classification number: H01L21/3081 ,  H01L21/78 ,  H01L29/1608

Abstract: In various embodiments, a method of patterning a substrate may include: forming an auxiliary layer on or above a substrate and forming a plasma etch mask layer on or above the auxiliary layer, wherein the auxiliary layer is configured such that it may be removed from the substrate more easily than the plasma etch mask layer; patterning the plasma etch mask layer and the auxiliary layer such that at least a portion of the substrate is exposed; patterning the substrate by means of a plasma etch process using the patterned plasma etch mask layer as a plasma etch mask.

Abstract translation: 在各种实施例中，图案化衬底的方法可以包括：在衬底上或上方形成辅助层，并在辅助层上或上方形成等离子体蚀刻掩模层，其中辅助层被配置为使得其可以从 衬底比等离子体蚀刻掩模层更容易; 图案化等离子体蚀刻掩模层和辅助层，使得至少一部分基板被暴露; 通过使用图案化等离子体蚀刻掩模层作为等离子体蚀刻掩模的等离子体蚀刻工艺图案化衬底。

公开(公告)号：US20080277760A1

公开(公告)日：2008-11-13

申请号：US11744962

申请日：2007-05-07

Applicant: Daniel Kohler ,  Manfred Engelhardt ,  Peter Baars ,  Hans-Peter Sperlich

Inventor： Daniel Kohler ,  Manfred Engelhardt ,  Peter Baars ,  Hans-Peter Sperlich

IPC: H01L29/00 ,  H01L21/28 ,  H01L21/311

CPC classification number: H01L28/91 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76816 ,  H01L27/10855

Abstract: An integrated circuit device includes a substrate with a first layer situated on the substrate. The first layer defines a first opening with a cover layer deposited on the first layer and coating a sidewall portion of the first opening. A second layer is situated on the cover layer. The second layer defines a second opening extending through the second layer and through the cover layer to connect the first and second openings.

Abstract translation: 集成电路器件包括具有位于衬底上的第一层的衬底。 第一层限定了具有沉积在第一层上并覆盖第一开口的侧壁部分的覆盖层的第一开口。 第二层位于覆盖层上。 第二层限定延伸穿过第二层并穿过覆盖层的第二开口以连接第一和第二开口。

公开(公告)号：US07321097B2

公开(公告)日：2008-01-22

申请号：US10204180

申请日：2001-02-02

Applicant: Manfred Engelhardt ,  Wolfgang Hönlein ,  Franz Kreupl

Inventor： Manfred Engelhardt ,  Wolfgang Hönlein ,  Franz Kreupl

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H01L21/76843 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H05K3/4076 ,  H01L2924/00

Abstract: The invention provides in a preferred embodiment an electronic component comprising a first conductive layer, a non-conductive layer and a second conductive layer. A hole is etched through the non-conductive layer. A nanotube, which is provided in said hole, links the first conductive layer to the second conductive layer in a conductive manner.

Abstract translation: 本发明在优选实施例中提供一种电子部件，其包括第一导电层，非导电层和第二导电层。 通过非导电层蚀刻孔。 设置在所述孔中的纳米管以导电方式将第一导电层与第二导电层连接。

公开(公告)号：US06946386B2

公开(公告)日：2005-09-20

申请号：US10854759

申请日：2004-05-25

Applicant: Gernot Steinlesberger ,  Manfred Engelhardt ,  Eugen Unger

Inventor： Gernot Steinlesberger ,  Manfred Engelhardt ,  Eugen Unger

IPC: C23C18/31 ,  C23C28/02 ,  H01L21/4763

CPC classification number: C23C18/31 ,  C23C28/023

Abstract: A method of forming an ultrathin homogenous metal layer that serves as base metallization for formation of contact locations and/or contact pads and/or wirings of an integrated electronic component. The method includes the steps of depositing a first metal layer on a substrate at least in regions, and producing a second metal layer on the first metal layer at least in regions, component(s) of the second metal layer have a more positive redox potential than component(s) of the first metal layer, wherein ultrathin homogenous deposition of the second metal layer is effected by wet-chemical, current-free, electrochemical redox processes by element exchange from one or more metal salts as oxidant with at least a top metal atomic layer of the first metal layer as reductant.

Abstract translation: 形成用于形成集成电子部件的接触位置和/或接触焊盘和/或布线的基底金属化的超薄均匀金属层的方法。 该方法包括以下步骤：至少在区域中在衬底上沉积第一金属层，并且至少在区域中在第一金属层上产生第二金属层，第二金属层的组分具有更正的氧化还原电位 其中第二金属层的超薄均匀沉积通过湿化学，无电流的电化学氧化还原过程通过元素交换从一种或多种金属盐作为氧化剂与至少一个顶部进行 第一金属层的金属原子层作为还原剂。

公开(公告)号：US20050118342A1

公开(公告)日：2005-06-02

申请号：US10980011

申请日：2004-11-03

Applicant: Manfred Engelhardt ,  Gernot Steinlesberger ,  Eugen Unger

Inventor： Manfred Engelhardt ,  Gernot Steinlesberger ,  Eugen Unger

IPC: B01J23/745 ,  B01J23/755 ,  B01J37/03 ,  C01B31/02 ,  C23C18/16 ,  C23C18/31 ,  B05D3/02

CPC classification number: B82Y30/00 ,  B01J23/745 ,  B01J23/755 ,  B01J37/03 ,  B82Y40/00 ,  C01B32/162 ,  C23C18/161 ,  C23C18/54

Abstract: A process for the selective and areal deposition of a catalyst is disclosed, which is intended for the growth of nanotubes, on an interconnect line in an integrated circuit or chip. The process includes providing an acidic or alkaline aqueous solution of the catalyst; applying the solution to the interconnect line; and removing the excess solution.

Abstract translation: 公开了用于在集成电路或芯片的互连线上用于纳米管生长的选择性和面积沉积催化剂的方法。 该方法包括提供催化剂的酸性或碱性水溶液; 将解决方案应用于互连线; 并除去多余的溶液。