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公开(公告)号:US20100326702A1
公开(公告)日:2010-12-30
申请号:US12490804
申请日:2009-06-24
Applicant: Bing Dang , David Hirsch Danovitch , Mario John Interrante , John Ulrich Knickerbocker , Michael Jay Shapiro , Van Thanh Truong
Inventor: Bing Dang , David Hirsch Danovitch , Mario John Interrante , John Ulrich Knickerbocker , Michael Jay Shapiro , Van Thanh Truong
CPC classification number: H01L21/6836 , H01L21/6835 , H01L24/02 , H01L24/11 , H01L24/16 , H01L24/81 , H01L24/94 , H01L24/95 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/68354 , H01L2221/68372 , H01L2224/0401 , H01L2224/11002 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/80006 , H01L2224/81005 , H01L2224/81011 , H01L2224/81801 , H01L2224/83005 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/01006 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , Y10T29/49117 , Y10T29/49124 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/49204 , H01L2224/81 , H01L2924/00012 , H01L2224/11 , H01L2224/83
Abstract: Methods and apparatus for forming an integrated circuit assembly are presented, for example, three dimensional integrated circuit assemblies. Lower height 3DIC assemblies due Use of, for example, thinned wafers, low-height solder bumps, and through silicon vias provide for low height three dimensional integrated circuit assemblies. For example, a method for forming an integrated circuit assembly comprises forming first solder bumps on a first die, and forming a first structure comprising the first die, the first solder bumps, a first flux, and a first substratum. The first die is placed upon the first substratum. The first solder bumps are between the first die and the first substratum. The first flux holds the first die substantially flat and onto the first substratum.
Abstract translation: 提出了用于形成集成电路组件的方法和装置,例如,三维集成电路组件。 较低的高度3DIC组件由于使用例如薄化晶片,低高度焊料凸块和通过硅通孔,可提供低高度三维集成电路组件。 例如,一种用于形成集成电路组件的方法包括在第一裸片上形成第一焊料凸块,以及形成包括第一裸片,第一焊料凸块,第一焊剂和第一衬底的第一结构。 第一个模具被放置在第一个基础上。 第一焊锡凸块位于第一裸片和第一衬底之间。 第一通量使第一模具基本平坦并保持在第一基底上。
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公开(公告)号:US08689437B2
公开(公告)日:2014-04-08
申请号:US12490804
申请日:2009-06-24
Applicant: Bing Dang , David Hirsch Danovitch , Mario John Interrante , John Ulrich Knickerbocker , Michael Jay Shapiro , Van Thanh Truong
Inventor: Bing Dang , David Hirsch Danovitch , Mario John Interrante , John Ulrich Knickerbocker , Michael Jay Shapiro , Van Thanh Truong
CPC classification number: H01L21/6836 , H01L21/6835 , H01L24/02 , H01L24/11 , H01L24/16 , H01L24/81 , H01L24/94 , H01L24/95 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/68354 , H01L2221/68372 , H01L2224/0401 , H01L2224/11002 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/80006 , H01L2224/81005 , H01L2224/81011 , H01L2224/81801 , H01L2224/83005 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/01006 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , Y10T29/49117 , Y10T29/49124 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/49204 , H01L2224/81 , H01L2924/00012 , H01L2224/11 , H01L2224/83
Abstract: A method for forming an integrated circuit assembly comprises forming first solder bumps on a first die, and forming a first structure comprising the first die, the first solder bumps, a first flux, and a first substratum. The first die is placed upon the first substratum. The first solder bumps are between the first die and the first substratum. The first flux holds the first die substantially flat and onto the first substratum.
Abstract translation: 一种用于形成集成电路组件的方法包括:在第一裸片上形成第一焊料凸块,以及形成包括第一裸片,第一焊料凸点,第一焊剂和第一衬底的第一结构。 第一个模具被放置在第一个基础上。 第一焊锡凸块位于第一裸片和第一衬底之间。 第一通量使第一模具基本平坦并保持在第一基底上。
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公开(公告)号:US06259155B1
公开(公告)日:2001-07-10
申请号:US09290311
申请日:1999-04-12
Applicant: Mario John Interrante , Raymond Alan Jackson , Sudipta Kumar Ray , Paul A. Zucco , Scott R. Dwyer
Inventor: Mario John Interrante , Raymond Alan Jackson , Sudipta Kumar Ray , Paul A. Zucco , Scott R. Dwyer
IPC: H01L2348
CPC classification number: H05K3/3436 , H01L23/49811 , H01L23/49894 , H01L2224/16225 , H01L2224/73253 , H01L2924/01046 , H01L2924/01322 , H01L2924/12044 , H01L2924/15312 , H01L2924/16152 , H05K2201/10977 , H05K2203/0415 , H05K2203/176 , Y02P70/613
Abstract: A ceramic column grid array package suitable for mounting application specific integrated circuits or microprocessor chips onto a printed circuit board employing polymer reinforced columns on the substrate module is described. The polymer enhancement is formed by coating a thin conformal film of a polymer, such as, a polyimide onto the substrate module after the formation of the ceramic column grids to mechanically enhance the column to substrate attachment of the column to the substrate prior to mounting on a printed circuit card. Upon curing of the polymer film at a temperature below the melting point of the solder bond attaching the column grid to the substrate, the columns will be mechanically reinforced in their attachment to the substrate. Upon removal of the substrate module from a printed circuit card during rework, the columns of the grid array will remain with the substrate module, leaving no columns on the printed circuit card.
Abstract translation: 描述了一种适用于将专用集成电路或微处理器芯片安装在使用基板模块上的聚合物增强柱的印刷电路板上的陶瓷柱栅格阵列封装。 在形成陶瓷柱网格之后,通过在形成陶瓷柱网格之后,将诸如聚酰亚胺等聚合物的薄的共形膜涂覆在基板组件上,以在安装到基板之前机械地增强柱与基板的连接,从而形成聚合物增强。 印刷电路卡。 当聚合物膜在低于焊接粘合点的温度下固化时,将柱格栅连接到基底上,柱将被附着到基底上机械地增强。 在返工过程中从打印电路卡移除基板模块后,网格阵列将保留在基板模块上,在印刷电路板上不留列。
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