公开(公告)号：US11978777B2

公开(公告)日：2024-05-07

申请号：US17122219

申请日：2020-12-15

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: H01L29/423 ,  H01L25/18 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L29/792 ,  H10B12/00 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC classification number: H01L29/4234 ,  H01L25/18 ,  H01L29/0649 ,  H01L29/401 ,  H01L29/66666 ,  H01L29/66833 ,  H01L29/7827 ,  H01L29/7926 ,  H10B12/05 ,  H10B12/31 ,  H10B12/50 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

Abstract: Structures and methods that facilitate the formation of gate contacts for vertical transistors constructed with semiconductor pillars and spacer-like gates are disclosed. In a first embodiment, a gate contact rests on an extended gate region, a piece of a gate film, patterned at a side of a vertical transistor at the bottom of the gate. In a second embodiment, an extended gate region is patterned on top of one or more vertical transistors, resulting in a modified transistor structure. In a third embodiment, a gate contact rests on a top surface of a gate merged between two closely spaced vertical transistors. Optional methods and the resultant intermediate structures are included in the first two embodiments in order to overcome the related topography and ease the photolithography. The third embodiment includes alternatives for isolating the gate contact from the semiconductor pillars or for isolating the affected semiconductor pillars from the substrate.

公开(公告)号：US11600309B2

公开(公告)日：2023-03-07

申请号：US17122173

申请日：2020-12-15

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: G11C7/10 ,  G11C7/06 ,  H01L27/092 ,  H01L29/786 ,  H01L23/528 ,  G11C7/12 ,  G11C8/10

Abstract: Structures for 3D sense amplifiers for 3D memories are disclosed. A first embodiment uses one type of vertical transistors in constructing 3D sense amplifiers. A second embodiment uses both n- and p-type transistors for 3D sense amplifiers. Either or both of n- and p-type transistors are vertical transistors. The n- and p-type transistors may reside on different levels, or on the same level above a substrate if both are vertical transistors. In any embodiment, different options are available for gate contact formation. In any embodiments and options or alternatives thereof, one or more sense-enable circuits may be used. Sense amplifiers for several bit lines may be staggered on one or both sides of a memory array. Column multiplexers may be used to couple particular bit lines to data outputs. Bit-line multiplexers may be used to couple certain bit lines to shared 3D sense amplifiers.

公开(公告)号：US20220102357A1

公开(公告)日：2022-03-31

申请号：US17032944

申请日：2020-09-25

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: H01L27/108 ,  H01L29/78 ,  H01L29/66

Abstract: The invention involves a method of manufacturing a bonded semiconductor structure, comprising providing a support substrate which carries a transistor, and providing an interconnect region earned by the support substrate. The interconnect region includes a first multiple bypass bitline having an upper bypass interconnect and upper bypass via. The method includes providing a first conductive bonding layer carried by the interconnect region, wherein the first conductive bonding layer is connected to the upper bypass interconnect through the upper bypass via, and providing a vertical transistor carried by the first conductive bonding layer, the vertical transistor being in communication with the transistor through the interconnect region. The first multiple bypass bitline reduces the impedance experienced by the vertical transistor.

公开(公告)号：US09012292B2

公开(公告)日：2015-04-21

申请号：US13175652

申请日：2011-07-01

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: H01L21/20 ,  H01L49/02 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L21/84 ,  H01L27/06 ,  H01L27/12

CPC classification number: H01L28/91 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/10808 ,  H01L27/1082 ,  H01L27/10852 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/11514 ,  H01L27/1207

Abstract: A method for fabricating semiconductor memory device, includes providing a semiconductor substrate; forming a lower region which includes a first data storage device, which is carried by the semiconductor substrate; forming a switching device which is carried by the first data storage device; and forming an upper region which includes a second data storage device, which is carried by the switching device. The step of forming the first storage device includes forming a first electrode having a cylindrical or pillar shape, the first electrode being connected to the switching device.

Abstract translation: 一种制造半导体存储器件的方法，包括提供半导体衬底; 形成下部区域，其包括由所述半导体基板承载的第一数据存储装置; 形成由所述第一数据存储装置承载的切换装置; 以及形成由所述切换装置携带的包括第二数据存储装置的上部区域。 形成第一存储装置的步骤包括形成具有圆柱形或柱状的第一电极，第一电极连接到开关装置。

公开(公告)号：US08811945B2

公开(公告)日：2014-08-19

申请号：US12093477

申请日：2006-10-11

Applicant: Jun-Won Choi ,  Joo-Mun Lee ,  Sang-Yun Lee ,  Myung-Sung Lee ,  Jae-Boo Chung

Inventor： Jun-Won Choi ,  Joo-Mun Lee ,  Sang-Yun Lee ,  Myung-Sung Lee ,  Jae-Boo Chung

IPC: H04M1/66 ,  H04M1/68 ,  H04M3/16 ,  H04L12/66

CPC classification number: G06F21/445 ,  G06F2221/2119 ,  G06Q20/02 ,  G06Q20/32 ,  G06Q20/322 ,  G06Q20/40 ,  G06Q20/4014 ,  H04L63/0823 ,  H04L63/0869 ,  H04L63/126 ,  H04L63/1483 ,  H04W12/06

Abstract: The present invention is to provide individual and payment information to a service server by recognizing whether the service server is to be trusted when individual identification information provided by a user is received from the service server. So, the invention provides an authentication method of the service server and a payment method by using the same, which can prevent the individual identification information and payment from being accessed by a distrusted server in wireless Internet. This present comprises acts of: storing individual identification information provided from a user in an authentication server; authenticating the service server when request of the stored individual identification information is received from the service server, and transmitting the stored individual identification information to the service server when the authentication has succeeded; transmitting a message of requesting a service access to a mobile terminal of the user from the service server; and transmitting the individual identification information sent from the authentication server to the mobile terminal by means of a transmitting query of the individual identification information from the mobile terminal.

Abstract translation: 本发明是通过从服务服务器接收到由用户提供的个体识别信息来识别服务服务器是否被信任，来向服务服务器提供个人和支付信息。 因此，本发明提供了服务服务器的认证方法和使用该方法的支付方法，其可以防止个人识别信息和支付被无线因特网中的不信任的服务器访问。 本发明包括以下动作：将从用户提供的个人识别信息存储在认证服务器中; 当从所述服务服务器接收到所存储的个人识别信息的请求时对所述服务服务器进行认证，并且当所述认证成功时将所存储的个人识别信息发送到所述服务服务器; 从所述服务服务器发送请求对所述用户的移动终端的服务访问的消息; 以及通过来自移动终端的个人识别信息的发送查询，发送从认证服务器发送到移动终端的个人识别信息。

公开(公告)号：US08779597B2

公开(公告)日：2014-07-15

申请号：US11180286

申请日：2005-07-12

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: H01L23/535

CPC classification number: H01L21/2007 ,  H01L23/48 ,  H01L24/29 ,  H01L24/83 ,  H01L27/0688 ,  H01L27/11551 ,  H01L2224/291 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/12036 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An apparatus includes a semiconductor chip with a base support structure having a surface and an opposed surface. At least one device structure extends from the surface of the base support structure. A first conductive region is coupled to the base support structure. At least a portion of the first conductive region extends below the opposed surface.

Abstract translation: 一种装置包括具有表面和相对表面的基座支撑结构的半导体芯片。 至少一个装置结构从基部支撑结构的表面延伸。 第一导电区域耦合到基座支撑结构。 第一导电区域的至少一部分在相对表面的下方延伸。

公开(公告)号：US08471263B2

公开(公告)日：2013-06-25

申请号：US12581722

申请日：2009-10-19

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: H01L29/06

CPC classification number: H01L21/2007 ,  H01L27/0688 ,  H01L27/11514 ,  H01L27/228 ,  H01L27/2454

Abstract: An information storage system includes a bonded semiconductor structure having a memory circuit region carried by an interconnect region. The memory circuit region includes a memory control device region having a vertically oriented memory control device. The memory circuit region includes a memory device region in communication with the memory control device region. The memory device region includes a memory device whose operation is controlled by the vertically oriented memory control device.

Abstract translation: 信息存储系统包括具有由互连区域承载的存储电路区域的键合半导体结构。 存储器电路区域包括具有垂直定向的存储器控​​制装置的存储器控​​制装置区域。 存储器电路区域包括与存储器控制装置区域通信的存储器件区域。 存储器件区域包括其操作由垂直定向的存储器控​​制器件控制的存储器件。

公开(公告)号：US08238918B2

公开(公告)日：2012-08-07

申请号：US11911840

申请日：2005-04-19

Applicant: Sang-Yun Lee ,  Jae-Young Ju ,  Hee-Hyeok Hahm ,  Young-Ho Joo ,  Bum-Soo Shin ,  Kyeong-Hee Han

Inventor： Sang-Yun Lee ,  Jae-Young Ju ,  Hee-Hyeok Hahm ,  Young-Ho Joo ,  Bum-Soo Shin ,  Kyeong-Hee Han

IPC: H04W36/00

CPC classification number: H04W36/14

Abstract: The present invention relates to a method of performing handover from an asynchronous mobile communication network to a synchronous mobile communication network. If the access network of the asynchronous mobile communication network (100) requests handover to an MSC (104) of the asynchronous mobile communication network, the MSC requests/receives subscriber information of the mobile communication terminal from a dual-stack HLR (300), and transmits a handover request message to the synchronous mobile communication network (200). The MSC (203) of the synchronous mobile communication network assigns a forward channel to the mobile communication terminal. The asynchronous mobile communication network (100) transmits a handover instruction message to the asynchronous RF device of the mobile communication terminal. Accordingly, the mobile communication terminal sets up a synchronous RF device, connects to the synchronous mobile communication network through reverse channel assignment and synchronization. The mobile communication terminal transmits a handover completion message to the synchronous mobile communication network.

Abstract translation: 本发明涉及一种执行从异步移动通信网络到同步移动通信网络的切换的方法。 如果异步移动通信网络（100）的接入网络请求切换到异步移动通信网络的MSC（104），则MSC从双栈HLR（300）请求/接收移动通信终端的用户信息， 并向同步移动通信网络（200）发送切换请求消息。 同步移动通信网络的MSC（203）向移动通信终端分配前向信道。 异步移动通信网络（100）向移动通信终端的异步RF设备发送切换指示消息。 因此，移动通信终端设置同步RF设备，通过反向信道分配和同步连接到同步移动通信网络。 移动通信终端向同步移动通信网络发送切换完成消息。

公开(公告)号：US08071438B2

公开(公告)日：2011-12-06

申请号：US12874866

申请日：2010-09-02

Applicant: Sang-Yun Lee

Inventor： Sang-Yun Lee

IPC: H01L21/02

CPC classification number: H01L21/2007 ,  H01L21/8221 ,  H01L24/29 ,  H01L24/83 ,  H01L27/0688 ,  H01L2224/291 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/07802 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

Abstract: A semiconductor memory device includes a substrate and an interconnect region carried by the substrate. A donor layer is coupled to the interconnect region through a bonding interface. An electronic device is formed with the donor layer, wherein the electronic device is formed after the bonding interface is formed. A capacitor is connected to the electronic device so that the electronic device and capacitor operate as a dynamic random access memory device.

Abstract translation: 半导体存储器件包括衬底和由衬底承载的互连区域。 供体层通过接合界面耦合到互连区域。 电子器件形成有施主层，其中在形成接合界面之后形成电子器件。 电容器连接到电子设备，使得电子设备和电容器作为动态随机存取存储器件操作。

公开(公告)号：US08056698B2

公开(公告)日：2011-11-15

申请号：US12440925

申请日：2007-09-12

Applicant: Ssang-geun Im ,  Sang-yun Lee ,  Seung-gyu Ko ,  Youn-soo Kim

Inventor： Ssang-geun Im ,  Sang-yun Lee ,  Seung-gyu Ko ,  Youn-soo Kim

IPC: H01L21/66 ,  H01L21/68 ,  H01L21/02

CPC classification number: G01R31/2893 ,  H01L21/673 ,  H01L21/67742

Abstract: Disclosed is a tray handling apparatus in which the conveyance and inversion of a tray can be performed simultaneously to thereby achieve a rapid inspecting operation and a simplified apparatus configuration, and a semiconductor device inspecting method using the tray handling apparatus. The tray handling apparatus includes an inverting unit to turn the tray, in which objects are received, upside down, and a transfer device to convey the object receiving tray from one conveyor to another conveyor while being reciprocally moved above a body of the apparatus. The inverting unit is integrally provided at a lower end of the transfer device, to allow the conveyance and inversion of the tray to be performed simultaneously.

Abstract translation: 公开了一种托盘处理装置，其中可以同时执行托盘的输送和倒转，从而实现快速检查操作和简化的装置构造，以及使用托盘处理装置的半导体装置检查方法。 托盘处理装置包括翻转单元，用于转动托盘，其中物体被接收，上下颠倒;以及传送装置，用于将物体接收托盘从一个传送器传送到另一传送器，同时在设备的主体上方往复移动。 翻转单元一体地设置在转印装置的下端，以允许托盘的输送和反转同时进行。