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公开(公告)号：US09799562B2
公开(公告)日：2017-10-24
申请号：US12545196
申请日：2009-08-21
申请人： Kyle K. Kirby , Sarah A. Niroumand
发明人： Kyle K. Kirby , Sarah A. Niroumand
IPC分类号： H01L21/48 , H01L21/768 , H01L23/48 , H01L23/00
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/16 , H01L2224/0401 , H01L2224/05025 , H01L2224/13025 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/3025 , H01L2924/00
摘要： Through vias and conductive routing layers in semiconductor substrates and associated methods of manufacturing are disclosed herein. In one embodiment, a method for processing a semiconductor substrate includes forming an aperture in a semiconductor substrate and through a dielectric on the semiconductor substrate. The aperture has a first end open at the dielectric and a second end opposite the first end. The method can also include forming a plurality of depressions in the dielectric, and simultaneously depositing a conductive material into the aperture and at least some of the depressions.
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2.发明申请MICROELECTRONIC DEVICES WITH THROUGH-SUBSTRATE INTERCONNECTS AND ASSOCIATED METHODS OF MANUFACTURING 有权具有通孔基板互连的微电子器件及相关制造方法公开(公告)号：US20110193226A1
公开(公告)日：2011-08-11
申请号：US12701800
申请日：2010-02-08
IPC分类号： H01L23/48 , H01L21/768 , H01L23/488
CPC分类号： H01L21/76877 , H01L21/30604 , H01L21/31111 , H01L21/76805 , H01L21/76883 , H01L21/76898 , H01L23/481 , H01L24/06 , H01L24/13 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05009 , H01L2224/0557 , H01L2224/05647 , H01L2224/06181 , H01L2224/13025 , H01L2224/16146 , H01L2225/06513 , H01L2225/06544 , H01L2225/06548 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00 , H01L2224/05552
摘要： Microelectronic devices with through-substrate interconnects and associated methods of manufacturing are disclosed herein. In one embodiment, a semiconductor device includes a semiconductor substrate carrying first and second metallization layers. The second metallization layer is spaced apart from the semiconductor substrate with the first metallization layer therebetween. The semiconductor device also includes a conductive interconnect extending at least partially through the semiconductor substrate. The first metallization layer is in electrical contact with the conductive interconnect via the second metallization layer.
摘要翻译： 本文公开了具有贯穿衬底互连和相关制造方法的微电子器件。 在一个实施例中，半导体器件包括承载第一和第二金属化层的半导体衬底。 第二金属化层与半导体衬底间隔开，其间具有第一金属化层。 半导体器件还包括至少部分延伸穿过半导体衬底的导电互连。 第一金属化层经由第二金属化层与导电互连电接触。
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3.发明授权Microelectronic devices with through-silicon vias and associated methods of manufacturing 有权具有通硅通孔和相关制造方法的微电子器件公开(公告)号：US08753981B2
公开(公告)日：2014-06-17
申请号：US13092434
申请日：2011-04-22
IPC分类号： H01L21/44 , H01L21/311
CPC分类号： H01L23/5226 , H01L21/02063 , H01L21/76843 , H01L21/76898 , H01L23/481 , H01L23/528 , H01L23/53238 , H01L23/53266 , H01L23/53271 , H01L2224/13025 , H01L2924/00013 , H01L2924/0002 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599
摘要： Microelectronic devices with through-silicon vias and associated methods of manufacturing such devices. One embodiment of a method for forming tungsten through-silicon vias comprising forming an opening having a sidewall such that the opening extends through at least a portion of a substrate on which microelectronic structures have been formed. The method can further include lining the sidewall with a dielectric material, depositing tungsten on the dielectric material such that a cavity extends through at least a portion of the tungsten, and filling the cavity with a polysilicon material.
摘要翻译： 具有通硅通孔的微电子器件及其相关制造方法。 一种用于形成钨硅通孔的方法的一个实施例，包括形成具有侧壁的开口，使得所述开口延伸穿过已经形成有微电子结构的衬底的至少一部分。 该方法可以进一步包括用介电材料衬里侧壁，在介电材料上沉积钨，使得空腔延伸穿过钨的至少一部分，并用多晶硅材料填充空腔。
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公开(公告)号：US20110042821A1
公开(公告)日：2011-02-24
申请号：US12545196
申请日：2009-08-21
申请人： Kyle K. Kirby , Sarah A. Niroumand
发明人： Kyle K. Kirby , Sarah A. Niroumand
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/16 , H01L2224/0401 , H01L2224/05025 , H01L2224/13025 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/3025 , H01L2924/00
摘要： Through vias and conductive routing layers in semiconductor substrates and associated methods of manufacturing are disclosed herein. In one embodiment, a method for processing a semiconductor substrate includes forming an aperture in a semiconductor substrate and through a dielectric on the semiconductor substrate. The aperture has a first end open at the dielectric and a second end opposite the first end. The method can also include forming a plurality of depressions in the dielectric, and simultaneously depositing a conductive material into the aperture and at least some of the depressions.
摘要翻译： 本文公开了半导体衬底中的通孔和导电布线层以及相关的制造方法。 在一个实施例中，一种用于处理半导体衬底的方法包括在半导体衬底中形成孔，并通过半导体衬底上的电介质。 开口具有在电介质处开放的第一端和与第一端相对的第二端。 该方法还可以包括在电介质中形成多个凹陷，并且同时将导电材料沉积到孔和至少一些凹陷中。
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5.发明授权Microelectronic devices with through-substrate interconnects and associated methods of manufacturing 有权具有贯穿衬底互连和相关制造方法的微电子器件公开(公告)号：US08907457B2
公开(公告)日：2014-12-09
申请号：US12701800
申请日：2010-02-08
IPC分类号： H01L29/40 , H01L25/00 , H01L21/768 , H01L25/065 , H01L23/48 , H01L23/00
CPC分类号： H01L21/76877 , H01L21/30604 , H01L21/31111 , H01L21/76805 , H01L21/76883 , H01L21/76898 , H01L23/481 , H01L24/06 , H01L24/13 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05009 , H01L2224/0557 , H01L2224/05647 , H01L2224/06181 , H01L2224/13025 , H01L2224/16146 , H01L2225/06513 , H01L2225/06544 , H01L2225/06548 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00 , H01L2224/05552
摘要： Microelectronic devices with through-substrate interconnects and associated methods of manufacturing are disclosed herein. In one embodiment, a semiconductor device includes a semiconductor substrate carrying first and second metallization layers. The second metallization layer is spaced apart from the semiconductor substrate with the first metallization layer therebetween. The semiconductor device also includes a conductive interconnect extending at least partially through the semiconductor substrate. The first metallization layer is in electrical contact with the conductive interconnect via the second metallization layer.
摘要翻译： 本文公开了具有贯穿衬底互连和相关制造方法的微电子器件。 在一个实施例中，半导体器件包括承载第一和第二金属化层的半导体衬底。 第二金属化层与半导体衬底间隔开，其间具有第一金属化层。 半导体器件还包括至少部分延伸穿过半导体衬底的导电互连。 第一金属化层经由第二金属化层与导电互连电接触。
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6.发明申请MICROELECTRONIC DEVICES WITH THROUGH-SILICON VIAS AND ASSOCIATED METHODS OF MANUFACTURING 有权具有透明硅的微电子器件及相关的制造方法公开(公告)号：US20120267786A1
公开(公告)日：2012-10-25
申请号：US13092434
申请日：2011-04-22
CPC分类号： H01L23/5226 , H01L21/02063 , H01L21/76843 , H01L21/76898 , H01L23/481 , H01L23/528 , H01L23/53238 , H01L23/53266 , H01L23/53271 , H01L2224/13025 , H01L2924/00013 , H01L2924/0002 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599
摘要： Microelectronic devices with through-silicon vias and associated methods of manufacturing such devices. One embodiment of a method for forming tungsten through-silicon vias comprising forming an opening having a sidewall such that the opening extends through at least a portion of a substrate on which microelectronic structures have been formed. The method can further include lining the sidewall with a dielectric material, depositing tungsten on the dielectric material such that a cavity extends through at least a portion of the tungsten, and filling the cavity with a polysilicon material.
摘要翻译： 具有通硅通孔的微电子器件及其相关制造方法。 一种用于形成钨硅通孔的方法的一个实施例，包括形成具有侧壁的开口，使得所述开口延伸穿过已经形成有微电子结构的衬底的至少一部分。 该方法可以进一步包括用介电材料衬里侧壁，在介电材料上沉积钨，使得空腔延伸穿过钨的至少一部分，并用多晶硅材料填充空腔。
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