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公开(公告)号：US08648453B2
公开(公告)日：2014-02-11
申请号：US12606504
申请日：2009-10-27
CPC分类号： H01L23/49816 , H01L21/561 , H01L23/3128 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0655 , H01L25/105 , H01L25/18 , H01L2224/05554 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10161 , H01L2924/10162 , H01L2924/15173 , H01L2924/15183 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/3511 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： In a POP type semiconductor device comprising a second semiconductor package as an upper package stacked on a first semiconductor package as a lower package, a plurality of main surface-side lands formed on a first wiring substrate of the first semiconductor package are disposed distributively on both sides of a chip mounting region as a boundary positioned at a central part of a main surface of the first wiring substrate, thus permitting the adoption of a through molding method. Consequently, a first sealing body formed on the main surface of the first wiring substrate in the first semiconductor package as a lower package extends from one second side of the first wiring substrate toward a central part of the other second side of the same substrate.
摘要翻译： 在包括堆叠在作为下封装的第一半导体封装上的作为上封装的第二半导体封装的POP型半导体器件中，形成在第一半导体封装的第一布线基板上的多个主表面侧焊盘分布地布置在两者上 作为位于第一布线基板的主表面的中心部分的边界的芯片安装区域的侧面，从而允许采用直通成型方法。 因此，形成在第一半导体封装中的第一布线基板的主表面上的第一密封体作为下封装从第一布线基板的一个第二侧朝向相同基板的另一第二侧的中心部分延伸。
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公开(公告)号：US20100181628A1
公开(公告)日：2010-07-22
申请号：US12691168
申请日：2010-01-21
申请人： Kenya Kawano , Kisho Ashida , Kuniharu Muto , Ichio Shimizu , Tomibumi Inoue
发明人： Kenya Kawano , Kisho Ashida , Kuniharu Muto , Ichio Shimizu , Tomibumi Inoue
IPC分类号： H01L23/495 , H01L23/48
CPC分类号： H01L24/85 , H01L23/4952 , H01L23/49548 , H01L23/49562 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L24/83 , H01L2224/0603 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/4847 , H01L2224/48599 , H01L2224/48699 , H01L2224/4903 , H01L2224/49051 , H01L2224/73265 , H01L2224/78301 , H01L2224/78703 , H01L2224/83801 , H01L2224/85181 , H01L2224/85205 , H01L2224/85385 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/83205 , H01L2224/85399 , H01L2224/05599 , H01L2924/206
摘要： Prevention of disconnection of a bonding wire resulting from adhesive interface delamination between a resin and a leadframe, and improvement of joint strength of the resin and the leadframe are achieved in a device manufactured by a low-cost and simple processing. A boss is provided on a source lead by a stamping processing, and a support pillar is provided in a concave portion on a rear side of the source lead in order to prevent ultrasonic damping upon joining the bonding wire onto the boss, so that an insufficiency of the joint strength between the bonding wire and the source lead is prevented. Also, a continuous bump is provided on the boss so as to surround a joint portion between the source lead and the bonding wire, so that disconnection of the bonding wire resulting from delamination between the resin and the source lead is prevented.
摘要翻译： 在通过低成本且简单的加工制造的装置中，可以防止树脂与引线框之间的粘合剂界面分层导致的接合线的断开，提高树脂和引线框的接合强度。 通过冲压加工在源极上设置凸台，并且在源极的后侧的凹部设置支撑柱，以便在将接合线接合到凸台上时防止超声波阻尼，使得不足 阻止了接合线和源极之间的接合强度。 此外，在凸台上设置连续凸块，以围绕源极引线和接合线之间的接合部分，从而防止由树脂和源极引线之间的分层导致的接合线的断开。
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公开(公告)号：US20100148350A1
公开(公告)日：2010-06-17
申请号：US12606504
申请日：2009-10-27
CPC分类号： H01L23/49816 , H01L21/561 , H01L23/3128 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0655 , H01L25/105 , H01L25/18 , H01L2224/05554 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10161 , H01L2924/10162 , H01L2924/15173 , H01L2924/15183 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/3511 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： In a POP type semiconductor device comprising a second semiconductor package as an upper package stacked on a first semiconductor package as a lower package, a plurality of main surface-side lands formed on a first wiring substrate of the first semiconductor package are disposed distributively on both sides of a chip mounting region as a boundary positioned at a central part of a main surface of the first wiring substrate, thus permitting the adoption of a through molding method. Consequently, a first sealing body formed on the main surface of the first wiring substrate in the first semiconductor package as a lower package extends from one second side of the first wiring substrate toward a central part of the other second side of the same substrate.
摘要翻译： 在包括堆叠在作为下封装的第一半导体封装上的作为上封装的第二半导体封装的POP型半导体器件中，形成在第一半导体封装的第一布线基板上的多个主表面侧焊盘分布地布置在两者上 作为位于第一布线基板的主表面的中心部分的边界的芯片安装区域的侧面，从而允许采用直通成型方法。 因此，形成在第一半导体封装中的第一布线基板的主表面上的第一密封体作为下封装从第一布线基板的一个第二侧朝向相同基板的另一第二侧的中心部分延伸。
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