Abstract:
An acoustic transducer comprising a substrate; and a diaphragm formed by depositing a micromachined membrane onto the substrate. The diaphragm is formed as a single silicon chip using a CMOS MEMS (microelectromechanical systems) semiconductor fabrication process. The curling of the diaphragm during fabrication is reduced by depositing the micromachined membrane for the diaphragm in a serpentine-spring configuration with alternating longer and shorter arms. As a microspeaker, the acoustic transducer of the present invention converts a digital audio input signal directly into a sound wave, resulting in a very high quality sound reproduction at a lower cost of production in comparison to conventional acoustic transducers. The micromachined diaphragm may also be used in microphone applications.
Abstract:
Structures, architectures, systems, an integrated circuit, methods and software for configuring an integrated circuit for multiple packaging types and/or selecting one of a plurality of packaging types for an integrated circuit. The structure generally comprises a bump pad having a plurality of electrically disconnected bump pad sections, a plurality of bond pads each configured for electrical connection to one of the bump pad sections, and a plurality of conductive traces, each adapted to electrically connect one of the bond pads to the one bump pad section. The software is generally configured to place and route components of such a structure. The method of configuring generally includes the steps of forming the bump pad, the bond pads, and the conductive traces from an uppermost metal layer, and forming an insulation layer thereover. The method of selecting generally comprises forming the uppermost metal layer, and forming either a wire bond to at least one of the bond pads, or a ball bond or solder ball to electrically connect the bump pad section. Embodiments of the present invention may advantageously provide reduced manufacturing costs and reduced inventory management issues by enabling one device to be manufactured at a wafer fab for a plurality of different packaging options, thereby enabling packaging decisions to be made at a later time in the manufacturing process.
Abstract:
An adjustable, segmented amplifier including (i) a first fixed stage configured to amplify an analog signal in accordance with a fixed amplification, and provide the analog signal amplified in accordance with the fixed amplification to a first common node. The adjustable, segmented amplifier further includes an adjustable stage comprising a plurality of independently selectable parallel amplifier segments, wherein the adjustable stage is configured to (i) amplify the analog signal provided to the first common node in accordance with an adjustable amplification that is adjustable depending upon a number of the independently selectable parallel amplifier segments having been selected to amplify the analog signal provided to the first common node, and (ii) provide the analog signal amplified in accordance with the fixed amplification and amplified in accordance with the adjustable amplification to the second common node.
Abstract:
An architecture, circuits, systems and a method for amplifying an analog signal. The architecture and/or circuit generally includes a first fixed stage (e.g., a predriver) and an adjustable stage. The first fixed stage may be configured to amplify an analog signal and provide a first amplified analog output at a first common node. The adjustable stage may comprise a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at a second common node, a transistor having a control terminal, and a first inductor in electrical communication with the control terminal of the transistor. The adjustable stage may be configured to apply a bias to the control terminal of the transistor in a selected segment and to provide an output signal in one of a plurality of a power ranges corresponding to a number of selected parallel amplifier segments. The output signal generally has a minimum power efficiency when two or more of the parallel segments are selected. The present invention advantageously provides a relatively compact power amplifier with an extended output power range at which the amplifier is highly efficient. In preferred embodiments, the input and output matching characteristics are generally independent of the number of selected output amplifier segments.
Abstract:
Disclosed is a transmit/receive circuit arrangement wherein a transceiver circuit including a transmit/receive switch is fabricated on an integrated circuit chip. A matching network is wholly disposed off-chip relative to the integrated circuit chip. In embodiments, at least a portion of the matching network is formed off-chip and a portion of the matching network is formed on-chip.
Abstract:
Disclosed is a transmit/receive circuit arrangement wherein a transceiver circuit including a transmit/receive switch is fabricated on an integrated circuit chip. A matching network is wholly disposed off-chip relative to the integrated circuit chip. In embodiments, at least a portion of the matching network is formed off-chip and a portion of the matching network is formed on-chip.
Abstract:
A power amplifier protection circuit that includes protection circuitry to variably shunt an input radio frequency (RF) signal to AC ground, turn off bias to an output transistor of a power amplifier, and turn off the output transistor. The power amplifier protection circuit features an asymmetrical control that can quickly shut off a power amplifier, and turn on the power amplifier at a steady, controlled rate when an output transistor exceeds a predetermined threshold voltage.
Abstract:
An amplifier with adjustable (pre)distortion, a predistortion adjustment circuit, systems and networks including such amplifiers and circuits, and methods for adjusting (pre)distortion in an analog amplifier. The amplifier architecture generally includes (a) a predistortion circuit configured to (i) select a value for a predistortion function from a plurality of different predistortion values, and (ii) apply the selected predistortion value to an input signal to generate a predistorted input signal; (b) an amplifier configured to amplify the predistorted input signal and provide an output signal therefrom; and (c) an adjustment circuit configured to adjust selection of the predistortion function value in response to a predetermined parameter value of the amplifier. By adjusting the predistortion function, the amplifier provides an output signal in a linear power range over a range of amplifier parameter values and avoids overcompensation that can occur when the predistortion signal is not adjustable. Furthermore, the adjustments are made in response to changes in amplifier input and/or control parameters, enabling the amplifier to stay in the linear range, rather than respond to changes that first cause the amplifier to fall out of linearity. The systems generally include the architecture, circuit or an integrated circuit that embodies one or more of the inventive concepts disclosed herein. The methods generally include the steps of (1) predistorting an input signal in accordance with a digital predistortion function to provide a predistorted signal, (2) adjusting the digital predistortion function in response to a predetermined parameter value of an amplifier, and (3) amplifying the predistorted signal with the amplifier to produce the amplified signal.