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    Open loop oscillator time-to-digital conversion
    2.
    发明授权
    Open loop oscillator time-to-digital conversion 有权

    公开(公告)号：US10454483B2

    公开(公告)日：2019-10-22

    申请号：US15332152

    申请日：2016-10-24

    Applicant: ANALOG DEVICES, INC.

    Inventor： Ralph D. Moore ,  Ryan Lee Bunch ,  Carroll C. Speir

    IPC: H03L7/00 ,  G04F10/00 ,  H03L7/085 ,  H04L7/033

    Abstract: A time-to-digital converter (TDC) detects a timing relationship between signals representing two temporal events. Several samples are acquired over a certain time period for each event, and the signals related to the different events are digitized or quantized either by separate TDCs or by a single TDC in a time-sequential manner. The quantized results are then processed, for example added to/subtracted from one another, and used to determine the phase or time difference between the two events. When information being quantized is quasi-static over time periods where the measurement is performed, the instantaneous or “one shot” accuracy of a TDC need not be as good as or better than the desired time resolution. Digitally processing the signals and averaging the results moves an otherwise difficult analog quantizer problem to the digital domain where savings in power and chip area can be easily achieved without sacrificing accuracy.

    Signal path linearization
    5.
    发明授权
    Signal path linearization 有权

    公开(公告)号：US10340934B1

    公开(公告)日：2019-07-02

    申请号：US15845796

    申请日：2017-12-18

    Applicant: Analog Devices, Inc.

    Inventor： Nevena Rakuljic ,  Carroll C. Speir ,  Eric Otte ,  Corey Petersen ,  Jeffrey P. Bray

    IPC: H03M1/10 ,  H03M1/12

    Abstract: To address non-linearity, an on-chip linearization scheme is implemented along with an analog-to-digital converter (ADC) to measure and correct/tune for non-linearities and/or other non-idealities of the signal path having the ADC. The on-chip linearization scheme involves generating one or more test signals using an on-chip digital-to-analog converter (DAC) and providing the one or more test signals as input to the signal path to be linearized, and estimating non-linearity based on the one or more test signals and the output of the ADC. Test signals can include single-tone signals, multi-tone signals, and wideband signals spread over a range of frequencies. A time-delayed interleaving clocking scheme can be used to achieve a higher data rate for coefficient estimation without having to increase the sample rate of the ADC.

    Randomly sampling reference ADC for calibration
    6.
    发明授权
    Randomly sampling reference ADC for calibration 有权
    随机采样参考ADC进行校准

    公开(公告)号：US09525428B2

    公开(公告)日：2016-12-20

    申请号：US14955905

    申请日：2015-12-01

    Applicant: ANALOG DEVICES, INC.

    Inventor： Siddharth Devarajan ,  Eric Otte ,  Nevena Rakuljic ,  Carroll C. Speir

    IPC: H03M1/12 ,  H03M1/10 ,  H03M1/46 ,  H03M3/00

    CPC classification number: H03M1/128 ,  H03M1/1019 ,  H03M1/1028 ,  H03M1/12 ,  H03M1/121 ,  H03M1/1215 ,  H03M1/46 ,  H03M1/462 ,  H03M1/468 ,  H03M3/382 ,  H03M3/498

    Abstract: Analog-to-digital converters (ADCs) can have errors which can affect their performance. To improve the performance, many techniques have been used to compensate or correct for the errors. When the ADCs are being implemented with sub-micron technology, ADCs can be readily and easily equipped with an on-chip microprocessor for performing a variety of digital functions. The on-chip microprocessor and any suitable digital circuitry can implement functions for reducing those errors, enabling certain undesirable artifacts to be reduced, and providing a flexible platform for a highly configurable ADC. The on-chip microprocessor is particularly useful for a randomized time-interleaved ADC. Moreover, a randomly sampling ADC can be added in parallel to a main ADC for calibration purposes. Furthermore, the overall system can include an efficient implementation for correcting errors in an ADC.

    Abstract translation: 模数转换器（ADC）可能会产生可能影响其性能的错误。 为了提高性能，已经使用许多技术来补偿或纠正错误。 当ADC采用亚微米技术实现时，ADC可以轻松轻松配备一个片上微处理器，用于执行各种数字功能。 片上微处理器和任何合适的数字电路可以实现减少这些错误的功能，从而能够减少某些不必要的伪像，并为高度可配置的ADC提供灵活的平台。 片上微处理器对于随机时间交织ADC特别有用。 此外，随机采样ADC可以并行添加到主ADC用于校准目的。 此外，整个系统可以包括用于校正ADC中的错误的有效实现。

    Programmable digital loopback for RF applications
    7.
    发明授权
    Programmable digital loopback for RF applications 有权

    公开(公告)号：US11057125B1

    公开(公告)日：2021-07-06

    申请号：US16912524

    申请日：2020-06-25

    Applicant: Analog Devices, Inc.

    Inventor： Peter Delos ,  Carroll C. Speir

    IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  H04B17/14 ,  H04B1/40

    Abstract: Various approaches to implementing digital loopback in a radio frequency (RF) system are disclosed. An example RF system includes a receiver that includes an ADC and a transmitter that includes a DAC. The apparatus includes multiple digital loopback circuits provided at different points between the digital domain processing of the receiver and the transmitter. Each digital loopback circuit may include a combiner and one or more weighing circuits, which make the circuit programmable. The combiner of a given digital loopback circuit is configured to combine a RX signal and a TX signal at a particular point of the digital domain processing of the receiver and the transmitter where said digital loopback circuit is implemented. The one or more weighting circuits are configured to define the how much of the TX signal and/or RX signal is used for said combination.

    Efficient calibration of errors in multi-stage analog-to-digital converter
    10.
    发明授权
    Efficient calibration of errors in multi-stage analog-to-digital converter 有权
    在多级模数转换器中有效校准误差

    公开(公告)号：US09503116B2

    公开(公告)日：2016-11-22

    申请号：US14955916

    申请日：2015-12-01

    Applicant: ANALOG DEVICES, INC.

    Inventor： Carroll C. Speir ,  Eric Otte ,  Jeffrey Paul Bray

    IPC: H03M1/10 ,  H03M1/12 ,  H03M3/00 ,  H03M1/46

    CPC classification number: H03M1/128 ,  H03M1/1019 ,  H03M1/1028 ,  H03M1/12 ,  H03M1/121 ,  H03M1/1215 ,  H03M1/46 ,  H03M1/462 ,  H03M1/468 ,  H03M3/382 ,  H03M3/498

    Abstract: Analog-to-digital converters (ADCs) can have errors which can affect their performance. To improve the performance, many techniques have been used to compensate or correct for the errors. When the ADCs are being implemented with sub-micron technology, ADCs can be readily and easily equipped with an on-chip microprocessor for performing a variety of digital functions. The on-chip microprocessor and any suitable digital circuitry can implement functions for reducing those errors, enabling certain undesirable artifacts to be reduced, and providing a flexible platform for a highly configurable ADC. The on-chip microprocessor is particularly useful for a randomized time-interleaved ADC. Moreover, a randomly sampling ADC can be added in parallel to a main ADC for calibration purposes. Furthermore, the overall system can include an efficient implementation for correcting errors in an ADC.

    Abstract translation: 模数转换器（ADC）可能会产生可能影响其性能的错误。 为了提高性能，已经使用许多技术来补偿或纠正错误。 当ADC采用亚微米技术实现时，ADC可以轻松轻松配备一个片上微处理器，用于执行各种数字功能。 片上微处理器和任何合适的数字电路可以实现减少这些错误的功能，从而能够减少某些不必要的伪像，并为高度可配置的ADC提供灵活的平台。 片上微处理器对于随机时间交织ADC特别有用。 此外，随机采样ADC可以并行添加到主ADC用于校准目的。 此外，整个系统可以包括用于校正ADC中的错误的有效实现。

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