公开(公告)号：US20020192948A1

公开(公告)日：2002-12-19

申请号：US09882696

申请日：2001-06-15

申请人： Applied Materials, Inc.

发明人： Fusen Chen ,  Ling Chen ,  Gongda Yao ,  Ming Xi ,  Barry Chin ,  Mei Chang ,  Seshadri Ganguli ,  Michael X. Yang ,  Hyungsuk Alexander Yoon

IPC分类号： H01L021/4763 ,  H01L021/44

CPC分类号： H01L21/76846 ,  H01L21/2855 ,  H01L21/28556

摘要： A method of forming a composite barrier layer structure for use in integrated circuits is disclosed. The composite barrier layer structure formed using both physical vapor deposition (PVD) and chemical vapor deposition (CVD) techniques. The composite barrier layer structure comprises a CVD deposited layer formed on a PVD deposited layer. During the PVD process, the underlying surface of the substrate is treated, reducing the resistivity of the barrier layer structure formed thereon.

摘要翻译： 公开了一种形成用于集成电路的复合势垒层结构的方法。 使用物理气相沉积（PVD）和化学气相沉积（CVD）技术形成的复合阻挡层结构。 复合势垒层结构包括形成在PVD沉积层上的CVD沉积层。 在PVD工艺期间，处理衬底的下表面，降低其上形成的阻挡层结构的电阻率。

公开(公告)号：US20010018137A1

公开(公告)日：2001-08-30

申请号：US09770934

申请日：2001-01-25

申请人： Applied Materials, Inc.

发明人： Tony Chiang ,  Peijun Ding ,  Barry Chin

IPC分类号： B32B015/04 ,  C23C014/34 ,  B32B009/00

CPC分类号： H01L21/76843 ,  C23C14/0641 ,  C23C14/165 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/28556 ,  H01L21/318 ,  H01L21/76864 ,  Y10T428/31678

摘要： We have discovered that, by depositing a tantalum layer upon a substrate at a temperature of at least 325null C., it is possible to obtain an ultra low resistivity which is lower than that previously published in the literature. In addition, it is possible deposit a TaxNy film having an ultra low resistivity by depositing the TaxNy film upon a substrate at a temperature of at least 275null C., wherein x is 1 and y ranges from about 0.05 to about 0.18. These films having an ultra low resistivity are obtained at temperatures far below the previously published temperatures for obtaining higher resistivity films. A combination of elevated substrate temperature and ion bombardment of the film surface during deposition enables the use of lower substrate temperatures while maintaining optimum film properties. In another development, we have discovered that the ultra low resistivity tantalum and TaxNy films produced by the method of the present invention also exhibit particularly low residual stress, so that they are more stable and less likely to delaminate from adjacent layers in a multilayered semiconductor structure. Further, these films can be chemical mechanical polished at significantly higher rates (at least 40% higher rates) than the higher resistivity tantalum and TaxNy films previously known in the industry. This is particularly useful in damascene processes when copper is used as the interconnect metal, since it reduces the possibility of copper dishing during a polishing step.

摘要翻译： 我们已经发现，通过在至少325℃的温度下在基底上沉积钽层，可以获得低于文献以前公开的超低电阻率。 此外，可以通过在至少275℃的温度下将TaxNy膜沉积在基底上来沉积具有超低电阻率的TaxNy膜，其中x为1，y为约0.05至约0.18。 在远低于先前发表的温度的温度下获得具有超低电阻率的这些膜，以获得更高电阻率的膜。 在沉积期间升高的基板温度和膜表面的离子轰击的组合使得能够使用较低的基板温度同时保持最佳的膜性质。 在另一个发展中，我们已经发现，通过本发明的方法生产的超低电阻率的钽和TaxNy膜也表现出特别低的残余应力，使得它们在多层半导体结构中比较相邻层更稳定和更不可能分层 。 此外，这些膜可以比以前在工业上已知的较高电阻率的钽和TaxNy膜以更高的速率（至少高40％的速率）进行化学机械抛光。 当使用铜作为互连金属时，这对于镶嵌工艺特别有用，因为它减少了在抛光步骤期间铜凹陷的可能性。

公开(公告)号：US20030000844A1

公开(公告)日：2003-01-02

申请号：US10180225

申请日：2002-06-26

申请人： Applied Materials, Inc.

发明人： Daniel A. Carl ,  Barry Chin ,  Liang Chen ,  Robin Cheung ,  Peijun Ding ,  Yezdi Dordi ,  Imran Hashim ,  Peter Hey ,  Ashok K. Sinha

IPC分类号： C23C014/00 ,  C23C014/32 ,  C23C028/00 ,  C23C028/02 ,  C25D005/34

CPC分类号： H01L21/2885 ,  H01L21/76877

摘要： One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.

公开(公告)号：US20020162738A1

公开(公告)日：2002-11-07

申请号：US10146416

申请日：2002-05-14

申请人： Applied Materials, Inc.

发明人： Tony Chiang ,  Peijun Ding ,  Barry Chin

IPC分类号： C23C014/34

CPC分类号： H01L21/02183 ,  C23C14/0641 ,  C23C14/165 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/02266 ,  H01L21/28556 ,  H01L21/318 ,  H01L21/76843 ,  H01L21/76864 ,  Y10T428/31678

摘要： We have discovered that, by depositing a tantalum layer upon a substrate at a temperature of at least 325null C., it is possible to obtain an ultra low resistivity which is lower than that previously published in the literature. In addition, it is possible deposit a TaxNy film having an ultra low resistivity by depositing the TaxNy film upon a substrate at a temperature of at least 275null C., wherein x is 1 and y ranges from about 0.05 to about 0.18. These films having an ultra low resistivity are obtained at temperatures far below the previously published temperatures for obtaining higher resistivity films. A combination of elevated substrate temperature and ion bombardment of the film surface during deposition enables the use of lower substrate temperatures while maintaining optimum film properties. In another development, we have discovered that the ultra low resistivity tantalum and TaxNy films produced by the method of the present invention also exhibit particularly low residual stress, so that they are more stable and less likely to delaminate from adjacent layers in a multilayered semiconductor structure. Further, these films can be chemical mechanical polished at significantly higher rates (at least 40% higher rates) than the higher resistivity tantalum and TaxNy films previously known in the industry. This is particularly useful in damascene processes when copper is used as the interconnect metal, since it reduces the possibility of copper dishing during a polishing step.

摘要翻译： 我们已经发现，通过在至少325℃的温度下在基底上沉积钽层，可以获得低于文献以前公开的超低电阻率。 此外，可以通过在至少275℃的温度下将TaxNy膜沉积在基底上来沉积具有超低电阻率的TaxNy膜，其中x为1，y为约0.05至约0.18。 在远低于先前发表的温度的温度下获得具有超低电阻率的这些膜，以获得更高电阻率的膜。 在沉积期间升高的基板温度和膜表面的离子轰击的组合使得能够使用较低的基板温度同时保持最佳的膜性质。 在另一个发展中，我们已经发现，通过本发明的方法生产的超低电阻率的钽和TaxNy膜也表现出特别低的残余应力，使得它们在多层半导体结构中比较相邻层更稳定和更不可能分层 。 此外，这些膜可以比以前在工业上已知的较高电阻率的钽和TaxNy膜以更高的速率（至少高40％的速率）进行化学机械抛光。 当使用铜作为互连金属时，这对于镶嵌工艺特别有用，因为它减少了在抛光步骤期间铜凹陷的可能性。

公开(公告)号：US20030116427A1

公开(公告)日：2003-06-26

申请号：US10202778

申请日：2002-07-25

申请人： Applied Materials, Inc.

发明人： Peijun Ding ,  Zheng Xu ,  Roderick C. Mosely ,  Suraj Rengarajan ,  Nirmalya Maity ,  Daniel A. Carl ,  Barry Chin ,  Paul F. Smith ,  Darryl Angelo ,  Anish Tolia ,  Jianming Fu ,  Fusen Chen ,  Praburam Gopalraja ,  Xianmin Tang ,  John C. Forster

IPC分类号： C23C014/32 ,  C23C014/34

CPC分类号： H01L21/76844 ,  C23C14/046 ,  C23C14/345 ,  C23C14/3457 ,  C23C14/358 ,  H01J37/321 ,  H01J37/3408 ,  H01J2237/3327 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089

摘要： A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by ICP resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering.

摘要翻译： 用于溅射诸如钽，氮化钽和铜的沉积材料的磁控溅射反应器及其使用方法，其中促进了自离子等离子体（SIP）溅射和电感耦合等离子体（ICP）溅射，其一起或者 交替地，在同一个房间。 此外，底部覆盖可以通过ICP再溅射而变薄或消除。 SIP由在溅射期间施加到靶的不均匀磁强度和高功率的磁极的小磁控管促进。 ICP由一个或多个将RF能量感应耦合到等离子体中的RF线圈提供。 组合的SIP-ICP层可以作为孔的衬垫或屏障或种子或成核层。 此外，可以在ICP溅射期间溅射RF线圈以提供保护材料。

公开(公告)号：US20030066747A1

公开(公告)日：2003-04-10

申请号：US10262652

申请日：2002-09-30

申请人： Applied Materials, Inc.

发明人： Arvind Sundarrajan ,  Darryl Angelo ,  Peiijun Ding ,  Barry Chin ,  Imran Hasim

IPC分类号： C23C014/32 ,  C23C014/00

CPC分类号： H01L21/76843 ,  C23C14/046 ,  C23C14/3492 ,  C23C14/358 ,  H01J37/32082 ,  H01J37/3402 ,  H01J2237/3327 ,  H01L21/2855 ,  H01L21/76873 ,  H01L21/76877

摘要： A multi-step process for the deposition of a material into high aspect ratio features on a substrate surface is provided. The process involves depositing a material on the substrate at a first pressure for a first period of time and then depositing the material on the substrate at a second pressure for a second period of time. Modulation of the pressure influences the ionization and trajectory of the particles, which are ionized in a plasma environment. The method of the invention in one aspect allows for optimum deposition at the bottom of a high aspect ratio feature during a high pressure step and increased deposition on the sidewalls of the feature during at least a low pressure step.

公开(公告)号：US20020132473A1

公开(公告)日：2002-09-19

申请号：US09805865

申请日：2001-03-13

申请人： Applied Materials ,Inc.

发明人： Tony Chiang ,  Peijun Ding ,  Barry Chin

IPC分类号： H01L021/4763

CPC分类号： H01L21/76855 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843

摘要： A method for forming an integrated barrier layer structure that is compatible with copper (Cu) metallization schemes for integrated circuit fabrication is disclosed. In one aspect, an integrated circuit is metallized by forming an integrated barrier layer structure on a silicon substrate followed by deposition of one or more copper (Cu) layers. The integrated barrier layer structure includes one or more barrier layers selected from tantalum (Ta), tantalum nitride (TaNx), tungsten (W), and tungsten nitride (WNx) conformably deposited on the silicon substrate. After the one or more barrier layers are deposited on the silicon substrate, the silicon substrate is heated to form a silicide layer at the interface between the silicon substrate and the barrier layers.

摘要翻译： 公开了一种形成与用于集成电路制造的铜（Cu）金属化方案兼容的集成阻挡层结构的方法。 在一个方面中，通过在硅衬底上形成集成的阻挡层结构，然后沉积一个或多个铜（Cu）层，从而对集成电路进行金属化。 集成阻挡层结构包括从硅（Ta），氮化钽（TaNx），钨（W）和氮化钨（WNx）中选择的一个或多个势垒层，其顺应地沉积在硅衬底上。 在一个或多个阻挡层沉积在硅衬底上之后，硅衬底被加热以在硅衬底和阻挡层之间的界面处形成硅化物层。

公开(公告)号：US20030194863A1

公开(公告)日：2003-10-16

申请号：US10421174

申请日：2003-04-22

申请人： APPLIED MATERIALS, INC.

发明人： Peijun Ding ,  Imran Hashim ,  Barry Chin ,  Bingxi Sun

IPC分类号： H01L021/4763 ,  H01L021/44

CPC分类号： H01L21/76876 ,  C23C14/0641 ,  C23C14/165 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76882

摘要： A method and apparatus for Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.

摘要翻译： 提供用于金属化处理序列的方法和装置，用于形成包括线，通孔和触点的可靠互连。 首先在图案化衬底上形成初始阻挡层，例如Ta或TaN，接着使用高密度等离子体PVD技术形成晶种层。 然后使用1）电镀，2）PVD回流，3）CVD，然后PVD回流或4）CVD来填充该结构。

公开(公告)号：US20030097013A1

公开(公告)日：2003-05-22

申请号：US10122491

申请日：2002-04-12

申请人： Applied Materials, Inc.

发明人： Ling Chen ,  Barry Chin

IPC分类号： C07F001/00 ,  C07F001/08 ,  C07F001/10 ,  C07F001/12 ,  C07F003/00 ,  C07F005/00 ,  C07F007/00 ,  C07F009/00 ,  C07F011/00 ,  C07F013/00 ,  C07F015/00 ,  C07F017/00

CPC分类号： C07C251/08

摘要： Nitrogen containing analogs of Copper II null-diketonates which analogs are more stable source reagents for copper deposition when substantially free of solvents of excess ligands. The nitrogen containing analogs replace -O- with nullN(Rnull)nullwherein Rnull is an alkyl group having from one to four carbon atoms. Replacement of each -O- is preferred although replacement of one -O- per cyclic ring is sufficient to improve stability of the copper source reagents. The source reagent can be purified by sublimation to remove solvents and excess ligands prior to semiconductor processing.

摘要翻译： 含铜的类似物铜IIβ-二酮类似物，当基本上不含过量配体的溶剂时，类似物是用于铜沉积的更稳定的源试剂。 含氮的类似物用-N（R“） - 取代-O-，其中R”是具有1-4个碳原子的烷基。 每个-O-的替代是优选的，尽管每个环的一个-O-取代足以提高铜源试剂的稳定性。 源试剂可以通过升华纯化，以在半导体加工之前除去溶剂和过量的配体。