GAS INJECTION SYSTEM FOR USE IN A PROCESSING CHAMBER

    公开(公告)号:US20240425986A1

    公开(公告)日:2024-12-26

    申请号:US18746189

    申请日:2024-06-18

    Abstract: Methods and apparatuses for decoupling the tuning of cross-substrate thickness variation and cross-substrate resistance variation in a gas injection system are described. A controller in a gas injection system may deposit, via control of the plurality of first mass flow controllers (MFCs) and the plurality of second MFCs, a material layer deposited on a substrate. The controller may adjust, via control of the plurality of first MFCs, a cross-substrate thickness variation of the material layer. The controller may adjust, via control of the plurality of second MFCs and independent of the cross-substrate thickness variation, cross-substrate resistivity variation of the material layer.

    LIFT PIN ACTUATORS FOR SEMICONDUCTOR PROCESSING SYSTEMS AND RELATED METHODS

    公开(公告)号:US20240112946A1

    公开(公告)日:2024-04-04

    申请号:US18476067

    申请日:2023-09-27

    CPC classification number: H01L21/68742 C23C16/4585

    Abstract: A lift pin actuator includes a castellated annulus, a first arm, a second arm, and a pin pad. The annulus arranged along a rotation axis and has a first merlon and a second merlon circumferentially separated by a crenel. The first arm is connected to the first merlon and extends outward from the annulus, the second arm is connected to the second merlon and extends outward from the annulus, and the second arm is circumferentially spaced from the first arm by a radial gap. The pin pad is connected to the annulus by the first arm and the second arm, is radially spaced from the annulus by the radial gap, and radially overlaps the crenel to nest a support member within the lift pin actuator during translation of the lift pin actuator along the rotation axis relative to the support member. Process kits, semiconductor processing systems, methods of making lift pin actuators and related material layer deposition methods are also described.

    SYSTEMS AND METHODS FOR PURGING REACTOR LOWER CHAMBERS WITH ETCHANTS DURING FILM DEPOSITION

    公开(公告)号:US20230116427A1

    公开(公告)日:2023-04-13

    申请号:US17962009

    申请日:2022-10-07

    Abstract: A semiconductor processing system includes a gas delivery module, and a chamber body connected to the gas delivery module. The divider has an aperture, is fixed within an interior of the chamber body, and separates an interior of the chamber body into upper and lower chambers, the aperture fluidly coupling the lower chamber to the upper chamber. A susceptor is arranged within the aperture. A controller is operably connected to the gas delivery module to purge the lower chamber with a first purge flow including an etchant while etching the upper chamber, purge the lower chamber with a second purge flow including the etchant while depositing a precoat in the upper chamber, and purge the lower chamber with a third purge flow including the etchant while depositing a film onto a substrate in the upper chamber. Film deposition methods and lower chamber etchant purge kits are also described.

    WAFER FAR EDGE TEMPERATURE MEASUREMENT SYSTEM WITH LAMP BANK ALIGNMENT

    公开(公告)号:US20220301906A1

    公开(公告)日:2022-09-22

    申请号:US17697164

    申请日:2022-03-17

    Abstract: A reactor system designed to provide accurate monitoring of wafer temperatures during deposition steps. The reactor system includes a pyrometer mounting assembly supporting and positioning three or more pyrometers (e.g., infrared (IR) pyrometers) relative to the reaction chamber to measure a center wafer temperature and an edge wafer temperature as well as reaction chamber temperature. The pyrometer mounting assembly provides a small spot size or temperature sensing area with the edge pyrometer to accurately measure edge wafer temperatures. A jig assembly, and installation method for each tool setup, is provided for use in achieving accurate alignment of the IR pyrometer sensing spot (and the edge pyrometer) relative to the wafer, when the pyrometer mounting assembly is mounted upon a lamp bank in the reactor system or in tool setup. The wafer edge temperature sensing with the reactor system assembled with proper alignment ensures accurate and repeatable measurement of wafer temperatures.

    EPITAXY FAST RAMP TEMPERATURE CONTROL SYSTEMS AND PROCESSES

    公开(公告)号:US20240404891A1

    公开(公告)日:2024-12-05

    申请号:US18677160

    申请日:2024-05-29

    Abstract: Substrate processing systems and methods include: (a) seating a substrate on a support; (b) optically measuring center substrate temperature using a first pyrometer; (c) optically measuring edge substrate temperature using a second pyrometer; and (d) determining an edge offset temperature between the edge substrate temperature and the center substrate temperature. Three temperature ramping steps are used to heat up the substrate for processing: two fast ramping steps and one slow ramping steps. After substrate processing, an initial, controlled cooling step is provided. During at least the second fast temperature ramping step, the slow temperature ramping step, the substrate processing step(s), and the initial controlled cooling step, heating of the substrate is controlled to place and/or hold the edge offset temperature within predetermined ranges in order to maintain uniform temperature and/or a desired temperature gradient across the substrate. Such systems and methods help avoid crystal defects (e.g., slip) and/or auto-doping.

    SYSTEMS AND METHODS FOR MONITORING A CONDITION OF LAMPS USED IN SEMICONDUCTOR FABRICATION PROCESSING

    公开(公告)号:US20240110283A1

    公开(公告)日:2024-04-04

    申请号:US18476009

    申请日:2023-09-27

    CPC classification number: C23C16/482 C23C16/481 H01L22/14

    Abstract: Methods and systems for monitoring a heat lamp system are disclosed. An exemplary method includes installing a new heat lamp within a reactor system, measuring an initial resistance value of the heat lamp, recording, by a controller, the initial resistance value of the heat lamp, determining a subsequent resistance value of the heat lamp, comparing the subsequent resistance value to the initial resistance value, determining whether the subsequent resistance value deviates from the initial resistance value by a programmed threshold value or more and/or falls below a programmed threshold voltage, and providing a user output to a user interface if the subsequent resistance value deviates from the initial resistance value by the programmed threshold value and/or falls below the programmed threshold voltage. An exemplary system can perform the method of monitoring the heat lamp system.

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