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公开(公告)号：US11768441B2
公开(公告)日：2023-09-26
申请号：US17801381
申请日：2021-02-03
CPC分类号： G03F7/70525
摘要： A method for controlling a process of manufacturing semiconductor devices, the method including: obtaining a first control grid associated with a first lithographic apparatus used for a first patterning process for patterning a first substrate; obtaining a second control grid associated with a second lithographic apparatus used for a second patterning process for patterning a second substrate; based on the first control grid and second control grid, determining a common control grid definition for a bonding step for bonding the first substrate and second substrate to obtain a bonded substrate; obtaining bonded substrate metrology data including data relating to metrology performed on the bonded substrate; and determining a correction for performance of the bonding step based on the bonded substrate metrology data, the determining a correction including determining a co-optimized correction for the bonding step and for the first patterning process and/or second patterning process.
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公开(公告)号：US11714357B2
公开(公告)日：2023-08-01
申请号：US17363057
申请日：2021-06-30
发明人： Alexander Ypma , Cyrus Emil Tabery , Simon Hendrik Celine Van Gorp , Chenxi Lin , Dag Sonntag , Hakki Ergün Cekli , Ruben Alvarez Sanchez , Shih-Chin Liu , Simon Philip Spencer Hastings , Boris Menchtchikov , Christiaan Theodoor De Ruiter , Peter Ten Berge , Michael James Lercel , Wei Duan , Pierre-Yves Jerome Yvan Guittet
CPC分类号： G03F7/70491 , G03F7/705 , G03F7/70658
摘要： A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.
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公开(公告)号：US10691863B2
公开(公告)日：2020-06-23
申请号：US15769539
申请日：2016-09-26
发明人： Peter Ten Berge , Everhardus Cornelis Mos , Richard Johannes Franciscus Van Haren , Peter Hanzen Wardenier , Erik Jensen
IPC分类号： G06F30/398 , G03F1/70 , G03F1/72 , G06F111/10
摘要： A method including modeling high resolution patterning error information of a patterning process involving a patterning device in a patterning system using an error mathematical model, modeling a correction of the patterning error that can be made by a patterning device modification tool using a correction mathematical model, the correction mathematical model having substantially the same resolution as the error mathematical model, and determining modification information for modifying the patterning device using the patterning device modification tool by applying the correction mathematical model to the patterning error information modeled by the error mathematical model.
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公开(公告)号：US20140354969A1
公开(公告)日：2014-12-04
申请号：US14355962
申请日：2012-11-22
发明人： Wouter Lodewijk Elings , Franciscus Bernardus Maria Van Bilsen , Christianus Gerardus Maria De Mol , Everhardus Cornelis Mos , Hoite Pieter Theodoor Tolsma , Peter Ten Berge , Paul Jacques Van Wijnen , Leonardus Henricus Marie Verstappen , Gerald Dicker , Reiner Maria Jungblut , Li Chung-Hsun
IPC分类号： G01N21/95 , H01J37/317 , G01N23/20
CPC分类号： G01B11/002 , G01B11/02 , G01B11/14 , G01B11/26 , G01N21/9501 , G01N21/956 , G01N21/95607 , G03F7/70508 , G03F7/70625 , G03F7/70633 , G05B19/41875 , G05B2219/37224 , H01L22/20 , Y02P90/20 , Y02P90/22
摘要： In the measurement of properties of a wafer substrate, such as Critical Dimension or overlay a sampling plan is produced (2506) defined for measuring a property of a substrate, wherein the sampling plan comprises a plurality of sub-sampling plans. The sampling plan may be constrained to a predetermined fixed number of measurement points and is used (2508) to control an inspection apparatus to perform a plurality of measurements of the property of a plurality of substrates using different sub-sampling plans for respective substrates, optionally, the results are stacked (2510) to at least partially recompose the measurement results according to the sample plan.
摘要翻译： 在测量晶片衬底的特性（例如临界尺寸或覆盖层）时，产生用于测量衬底性质的采样计划（2506），其中采样计划包括多个次采样图。 采样计划可以被约束到预定的固定数量的测量点，并且被使用（2508）来控制检查装置，以使用对于各个基板的不同的子采样计划来执行多个基板的属性的多个测量 ，结果（2510）根据样本计划至少部分地重新组合测量结果。
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公开(公告)号：US11036146B2
公开(公告)日：2021-06-15
申请号：US15769339
申请日：2016-09-26
发明人： Richard Johannes Franciscus Van Haren , Everhardus Cornelis Mos , Peter Ten Berge , Peter Hanzen Wardenier , Erik Jensen , Hakki Ergün Cekli
摘要： A method including: obtaining information regarding a patterning error in a patterning process involving a patterning device; determining a nonlinearity over a period of time introduced by modifying the patterning error by a modification apparatus according to the patterning error information; and determining a patterning error offset for use with the modification apparatus based on the determined nonlinearity.
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公开(公告)号：US10719011B2
公开(公告)日：2020-07-21
申请号：US15765489
申请日：2016-09-27
发明人： Peter Ten Berge , Daan Maurits Slotboom , Richard Johannes Franciscus Van Haren , Peter Hanzen Wardenier
摘要： A method including: determining first error information based on a first measurement and/or simulation result pertaining to a first patterning device in a patterning system; determining second error information based on a second measurement and/or simulation result pertaining to a second patterning device in the patterning system; determining a difference between the first error information and the second error information; and creating modification information for the first patterning device and/or the second patterning device based on the difference between the first error information and the second error information, wherein the difference between the first error information and the second error information is reduced to within a certain range after the first patterning device and/or the second patterning device is modified according to the modification information.
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公开(公告)号：US10317191B2
公开(公告)日：2019-06-11
申请号：US15432684
申请日：2017-02-14
发明人： Wouter Lodewijk Elings , Franciscus Bernardus Maria Van Bilsen , Christianus Gerardus Maria De Mol , Everhardus Cornelis Mos , Hoite Pieter Theodoor Tolsma , Peter Ten Berge , Paul Jacques Van Wijnen , Leonardus Henricus Marie Verstappen , Gerald Dicker , Reiner Maria Jungblut , Chung-Hsun Li
IPC分类号： G03F7/20 , G01B11/00 , G01B11/02 , G01B11/14 , G01B11/26 , G01N21/95 , H01L21/66 , G01N21/956 , G05B19/418
摘要： In the measurement of properties of a wafer substrate, such as Critical Dimension or overlay a sampling plan is produced 2506 defined for measuring a property of a substrate, wherein the sampling plan comprises a plurality of sub-sampling plans. The sampling plan may be constrained to a predetermined fixed number of measurement points and is used 2508 to control an inspection apparatus to perform a plurality of measurements of the property of a plurality of substrates using different sub-sampling plans for respective substrates, optionally, the results are stacked 2510 to at least partially recompose the measurement results according to the sample plan.
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公开(公告)号：US11977034B2
公开(公告)日：2024-05-07
申请号：US17194558
申请日：2021-03-08
发明人： Wouter Lodewijk Elings , Franciscus Bernardus Maria Van Bilsen , Christianus Gerardus Maria De Mol , Everhardus Cornelis Mos , Hoite Pieter Theodoor Tolsma , Peter Ten Berge , Paul Jacques Van Wijnen , Leonardus Henricus Marie Verstappen , Gerald Dicker , Reiner Maria Jungblut , Chung-Hsun Li
IPC分类号： G01B11/14 , G01B11/00 , G01B11/02 , G01B11/26 , G01N21/95 , G01N21/956 , G03F7/00 , G05B19/418 , H01L21/66
CPC分类号： G01N21/9501 , G01B11/002 , G01B11/02 , G01B11/14 , G01B11/26 , G01N21/956 , G01N21/95607 , G03F7/70508 , G03F7/70625 , G03F7/70633 , G05B19/41875 , H01L22/20 , G05B2219/37224 , Y02P90/02
摘要： In the measurement of properties of a wafer substrate, such as Critical Dimension or overlay a sampling plan is produced defined for measuring a property of a substrate, wherein the sampling plan comprises a plurality of sub-sampling plans. The sampling plan may be constrained to a predetermined fixed number of measurement points and is used to control an inspection apparatus to perform a plurality of measurements of the property of a plurality of substrates using different sub-sampling plans for respective substrates, optionally, the results are stacked to at least partially recompose the measurement results according to the sample plan.
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公开(公告)号：US11170072B2
公开(公告)日：2021-11-09
申请号：US15558186
申请日：2016-03-25
发明人： Everhardus Cornelis Mos , Velislava Ignatova , Erik Jensen , Michael Kubis , Hubertus Johannes Gertrudus Simons , Peter Ten Berge , Erik Johannes Maria Wallerbos , Jochem Sebastiaan Wildenberg
摘要： A method including evaluating, with respect to a parameter representing remaining uncertainty of a mathematical model fitting measured data, one or more mathematical models for fitting measured data and one or more measurement sampling schemes for measuring data, against measurement data across a substrate, and identifying one or more mathematical models and/or one or more measurement sampling schemes, for which the parameter crosses a threshold.
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公开(公告)号：US11086229B2
公开(公告)日：2021-08-10
申请号：US16497826
申请日：2018-03-29
发明人： Alexander Ypma , Cyrus Emil Tabery , Simon Hendrik Celine Van Gorp , Chenxi Lin , Dag Sonntag , Hakki Ergün Cekli , Ruben Alvarez Sanchez , Shih-Chin Liu , Simon Philip Spencer Hastings , Boris Menchtchikov , Christiaan Theodoor De Ruiter , Peter Ten Berge , Michael James Lercel , Wei Duan , Pierre-Yves Jerome Yvan Guittet
IPC分类号： G03F7/20
摘要： A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.
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