公开(公告)号：US20090050895A1

公开(公告)日：2009-02-26

申请号：US12195508

申请日：2008-08-21

申请人： Akihiko Hiroe ,  Akinobu Teramoto ,  Tadahiro Ohmi

发明人： Akihiko Hiroe ,  Akinobu Teramoto ,  Tadahiro Ohmi

IPC分类号： H01L29/04 ,  H01L21/336 ,  H01L21/67

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1229 ,  H01L29/66757 ,  H01L29/78618

摘要： In a semiconductor manufacturing method that manufactures a coplanar type thin film transistor, a microcrystalline film 10 that will become a channel region is formed on a glass substrate S, a sacrificial silicon oxide 20 film is formed on the microcrystalline film 10, and, in a state in which a surface boundary of the microcrystalline film 10 is protected by the sacrificial silicon oxide film 20, a doped silicon film 30 is built up that will become a source region and a drain region. A photoresist R film is applied on the doped silicon film 30 and planarized. With the sacrificial silicon oxide film 20 in an uncovered state, etching is performed until the microcrystalline film 10 and the doped silicon film 30 reside in approximately the same plane.

摘要翻译： 在制造共面型薄膜晶体管的半导体制造方法中，在玻璃基板S上形成成为沟道区的微晶膜10，在微晶膜10上形成牺牲氧化硅20膜，在 由牺牲氧化硅膜20保护微晶膜10的表面边界的状态，构成将成为源极区域和漏极区域的掺杂硅膜30。 将光致抗蚀剂R膜施加在掺杂硅膜30上并平坦化。 在牺牲氧化硅膜20处于未覆盖状态下，进行蚀刻直到微晶膜10和掺杂硅膜30位于大致相同的平面中。

公开(公告)号：US20080241016A1

公开(公告)日：2008-10-02

申请号：US12058323

申请日：2008-03-28

申请人： Mitsuo KATO ,  Masaki Sugiyama ,  Akihiko Hiroe ,  Tadahiro Ohmi ,  Masaki Hirayama

发明人： Mitsuo KATO ,  Masaki Sugiyama ,  Akihiko Hiroe ,  Tadahiro Ohmi ,  Masaki Hirayama

IPC分类号： B01J19/12

CPC分类号： H01J37/3299 ,  H01J37/32192 ,  H01J37/32935

摘要： A microwave plasma processing system 10 includes: a processing chamber 100 in which a desired process is applied to a target object using a plasma; a susceptor 106 (stage) in the processing chamber 100 to support the target object; a high-frequency power supply 112 supplying high-frequency electric power to the susceptor 106; a capacitor 108a provided to the susceptor 106; and a measurement device 20 measuring voltages at the pair of plates of the capacitor 108a when high-frequency electric power is supplied from the high-frequency power supply 112 to the susceptor 106.

摘要翻译： 微波等离子体处理系统10包括：处理室100，其中使用等离子体将期望的处理应用于目标物体; 处理室100中的基座106（阶段）以支撑目标物体; 向基座106供给高频电力的高频电源112; 设置在基座106上的电容器108a; 以及测量装置20，当从高频电源112向基座106提供高频电力时，测量电容器108a的一对板的电压。

公开(公告)号：US08241457B2

公开(公告)日：2012-08-14

申请号：US12058323

申请日：2008-03-28

申请人： Mitsuo Kato ,  Masaki Sugiyama ,  Akihiko Hiroe ,  Tadahiro Ohmi ,  Masaki Hirayama

发明人： Mitsuo Kato ,  Masaki Sugiyama ,  Akihiko Hiroe ,  Tadahiro Ohmi ,  Masaki Hirayama

IPC分类号： H01L21/00 ,  C23C16/00 ,  C23C14/00

CPC分类号： H01J37/3299 ,  H01J37/32192 ,  H01J37/32935

摘要： A microwave plasma processing system 10 includes: a processing chamber 100 in which a desired process is applied to a target object using a plasma; a susceptor 106 (stage) in the processing chamber 100 to support the target object; a high-frequency power supply 112 supplying high-frequency electric power to the susceptor 106; a capacitor 108a provided to the susceptor 106; and a measurement device 20 measuring voltages at the pair of plates of the capacitor 108a when high-frequency electric power is supplied from the high-frequency power supply 112 to the susceptor 106.

摘要翻译： 微波等离子体处理系统10包括：处理室100，其中使用等离子体将期望的处理应用于目标物体; 处理室100中的基座106（阶段）以支撑目标物体; 向基座106供给高频电力的高频电源112; 设置在基座106上的电容器108a; 以及测量装置20，当从高频电源112向基座106提供高频电力时，测量电容器108a的一对板的电压。

公开(公告)号：US07582569B2

公开(公告)日：2009-09-01

申请号：US10591294

申请日：2004-03-10

申请人： Tadahiro Ohmi ,  Naohisa Goto ,  Nobuhiro Kuga ,  Akihiko Hiroe

发明人： Tadahiro Ohmi ,  Naohisa Goto ,  Nobuhiro Kuga ,  Akihiko Hiroe

IPC分类号： H01L21/302

CPC分类号： H01J37/32229 ,  H01J37/32192

摘要： A distributor (30) includes a square waveguide (31) to be connected to a microwave oscillator (20) and a square waveguide (41) having a plurality of openings (43) formed in a narrow wall (41B). The square waveguide (31) is hollow. A wave delaying member (53) having a relative dielectric constant ∈r is arranged in the square waveguide (41). Narrow walls (31A, 41A) of the two square waveguides (31, 41) are brought into contact with each other, and a communication hole (32) through which the two waveguides (31, 41) communicate with each other is formed in the narrow walls (31A, 41A). The widths of the two waveguides (31, 41) do not become narrow at their connecting portion even if the width of the communication hole (32) is decreased. Thus, a band of a frequency that can pass through the connecting portion is suppressed from becoming narrow. Consequently, reflection loss that occurs when the frequency of electromagnetic waves to be input to the distributor (30) changes can be decreased.

摘要翻译： 分配器（30）包括与微波振荡器（20）连接的方波导（31）和形成在窄壁（41B）中的多个开口部分的方波导41。 方波导（31）是中空的。 具有相对介电常数εr的波延迟构件（53）布置在方波导（41）中。 使两个方波导管（31,41）的窄壁（31A，41A）彼此接触，并且在两个波导管（31,41）彼此连通的连通孔（32） 狭窄的墙壁（31A，41A）。 即使连通孔（32）的宽度减小，两个波导（31,41）的宽度也不会变窄。 因此，可以抑制能够穿过连接部的频率带变窄。 因此，能够减少输入到分配器30的电磁波的频率发生变化时的反射损失。

公开(公告)号：US20070133919A1

公开(公告)日：2007-06-14

申请号：US10591294

申请日：2004-03-10

申请人： Tadahiro Ohmi ,  Naohisa Goto ,  Nobuhiro Kuga ,  Akihiko Hiroe

发明人： Tadahiro Ohmi ,  Naohisa Goto ,  Nobuhiro Kuga ,  Akihiko Hiroe

IPC分类号： G02F1/295

CPC分类号： H01J37/32229 ,  H01J37/32192

摘要： A distributor (30) includes a square waveguide (31) to be connected to a microwave oscillator (20) and a square waveguide (41) having a plurality of openings (43) formed in a narrow wall (41B). The square waveguide (31) is hollow. A wave delaying member (53) having a relative dielectric constant εr is arranged in the square waveguide (41). Narrow walls (31A, 41A) of the two square waveguides (31, 41) are brought into contact with each other, and a communication hole (32) through which the two waveguides (31, 41) communicate with each other is formed in the narrow walls (31A, 41A). The widths of the two waveguides (31, 41) do not become narrow at their connecting portion even if the width of the communication hole (32) is decreased. Thus, a band of a frequency that can pass through the connecting portion is suppressed from becoming narrow. Consequently, reflection loss that occurs when the frequency of electromagnetic waves to be input to the distributor (30) changes can be decreased.

摘要翻译： 分配器（30）包括要连接到微波振荡器（20）的方波导（31）和形成在窄壁（41B）中的多个开口43的方波导41。 方波导（31）是中空的。 具有相对介电常数εL r的波延迟构件（53）布置在方波导（41）中。 使两个方波导管（31,41）的窄壁（31A，41A）彼此接触，并且形成两个波导（31,41）彼此连通的连通孔（32） 在狭窄的墙壁（31 A，41 A）。 即使连通孔（32）的宽度减小，两个波导（31,41）的宽度也不会变窄。 因此，可以抑制能够穿过连接部的频率带变窄。 因此，能够减少输入到分配器30的电磁波的频率发生变化时的反射损失。

公开(公告)号：US20070054064A1

公开(公告)日：2007-03-08

申请号：US10566241

申请日：2004-12-24

申请人： Tadahiro Ohmi ,  Masaki Hirayama ,  Takahiro Horiguchi ,  Akihiko Hiroe ,  Masayuki Kitamura

发明人： Tadahiro Ohmi ,  Masaki Hirayama ,  Takahiro Horiguchi ,  Akihiko Hiroe ,  Masayuki Kitamura

IPC分类号： H05H1/24 ,  C23C16/00

CPC分类号： H01L21/306 ,  H05H1/46 ,  H05H2001/4622 ,  H05H2001/463

摘要： A microwave plasma processing method and, in which a linear plasma is produced by means of a microwave, and an object to be processed is subjected to processing under atmospheric pressure or under a pressure near atmospheric pressure when the object is moved, while a surface of the object is maintained at a horizontal position with respect to the linear plasma. A plasma head has an H-plane slot antenna, and slots are arranged alternately on both sides of a centerline of a waveguide at a pitch of λg/2 (λg: wavelength of the microwave with the waveguide). A uniforming line having a distance of n·λg/2 from the slots to an emission end of the plasma head is provided (n: an integral number).

摘要翻译： 微波等离子体处理方法，其中通过微波产生线性等离子体和待处理物体在大气压力下或当物体移动时在大气压附近的压力下进行处理，同时 物体相对于线性等离子体保持在水平位置。 等离子体头具有H平面缝隙天线，并且以波兰的间距（lambdag：具有波导的微波的波长）交替地布置在波导的中心线的两侧。 提供了从槽到发射端等离子体头的距离为n.lambdag / 2的均匀线（n：整数）。

公开(公告)号：US5264710A

公开(公告)日：1993-11-23

申请号：US864944

申请日：1992-04-07

申请人： Hideo Yamagishi ,  Akihiko Hiroe ,  Hitoshi Nishio ,  Keiko Miki ,  Kazunori Tsuge ,  Yoshihisa Tawada

发明人： Hideo Yamagishi ,  Akihiko Hiroe ,  Hitoshi Nishio ,  Keiko Miki ,  Kazunori Tsuge ,  Yoshihisa Tawada

IPC分类号： H01L21/205 ,  H01L21/30 ,  H01L31/20 ,  H01L45/00

CPC分类号： H01L31/202 ,  H01L21/02381 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/3003 ,  H01L31/204 ,  H01L31/208 ,  Y02E10/50 ,  Y02P70/521

摘要： Amorphous semiconductor thin film is exposed to an atmosphere of hydrogen radical during or after the formation of thin film, or is subject to light irradiation having a density of not less than 10 W/cm.sup.2 at a wavelength of 300 to 700 nm during the formation of the thin film. The obtained thin film has improved, i.e. small, photo deterioration. The semiconductor device using the above thin film is preferably applied to solar cells or thin film transistors.

摘要翻译： 在形成薄膜期间或之后，将非晶半导体薄膜暴露于氢自由基的气氛中，或者在形成时在300-700nm的波长下进行密度不小于10W / cm 2的光照射 薄膜。 获得的薄膜具有改善的，即较小的光劣化。 使用上述薄膜的半导体器件优选地应用于太阳能电池或薄膜晶体管。

公开(公告)号：US5027382A

公开(公告)日：1991-06-25

申请号：US451176

申请日：1989-12-15

申请人： Akihiko Hiroe ,  Noriyuki Terao

发明人： Akihiko Hiroe ,  Noriyuki Terao

IPC分类号： G11C19/00

CPC分类号： G11C19/00

摘要： A shift register circuit comprises a series circuit comprising a plurality of first clocked gate inverters and inverters which are alternately connected in series, where a first one of the first clocked gate inverters is adapted to receive an input pulse signal, an output line connected to an output of each of the inverters for outputting an output pulse signal, and a second clocked gate inverter connected to the output of each of the inverters for outputting an output pulse signal. The first clocked gate inverters operate responsive to a first clock signal, and the second clocked gate inverters operate responsive to a second clock signal which is different from the first clock signal.

摘要翻译： 移位寄存器电路包括串联电路，其包括串联交替连接的多个第一时钟门控反相器和反相器，其中第一时钟门控反相器中的第一个适于接收输入脉冲信号，输出线连接到 输出用于输出输出脉冲信号的每个反相器的输出;以及连接到每个反相器的输出的第二时钟控制反相器，用于输出输出脉冲信号。 第一时钟门反相器响应于第一时钟信号而工作，并且第二时钟门控反相器响应于与第一时钟信号不同的第二时钟信号而工作。

公开(公告)号：US5015838A

公开(公告)日：1991-05-14

申请号：US294625

申请日：1989-01-27

申请人： Hideo Yamagishi ,  Akihiko Hiroe ,  Hitoshi Nishio ,  Satoru Murakami ,  Keiko Miki ,  Minori Yamaguchi ,  Seishiro Mizukami ,  Yoshihisa Tawada

发明人： Hideo Yamagishi ,  Akihiko Hiroe ,  Hitoshi Nishio ,  Satoru Murakami ,  Keiko Miki ,  Minori Yamaguchi ,  Seishiro Mizukami ,  Yoshihisa Tawada

IPC分类号： G01J3/50 ,  H01L27/14 ,  H01L31/075 ,  H01L31/10 ,  H01L31/101

CPC分类号： H01L31/076 ,  H01L31/101 ,  Y02E10/548

摘要： A color sensor of the present invention is a semiconductor element comprising a semiconductor wherein a plurality of pn or pin junctions are laminated, and conductive layers which are laminated on both surfaces of the semiconductor, characterized in that the semiconductor element is arranged in a way that the quantity of production of photocarriers is increased in order from the light incident side for the whole wave length band to be measured, and that value of current is detected by changing voltage between both conductivity layers. According to the color sensor of the present invention, the construction can be simplified, it is easily integrated and large-scaled, manufacturing process can be simplified, and the yield of color sensors increases, so that there can be realized a color sensor with low cost.

公开(公告)号：US5032884A

公开(公告)日：1991-07-16

申请号：US477138

申请日：1990-02-07

申请人： Hideo Yamagishi ,  Masataka Kondo ,  Kunio Nishimura ,  Akihiko Hiroe ,  Keizou Asaoka ,  Kazunori Tsuge ,  Yoshihisa Tawada ,  Minori Yamaguchi

发明人： Hideo Yamagishi ,  Masataka Kondo ,  Kunio Nishimura ,  Akihiko Hiroe ,  Keizou Asaoka ,  Kazunori Tsuge ,  Yoshihisa Tawada ,  Minori Yamaguchi

IPC分类号： H01L31/075 ,  H01L31/20

CPC分类号： H01L31/075 ,  H01L31/202 ,  H01L31/204 ,  Y02E10/548 ,  Y02P70/521

摘要： A semiconductor device comprising a pin-type or nip-type amorphous-containing semiconductor layers; characterized in that (1) at least one interlayer made of semiconductor or insulator having higher electrical resistivity than a semiconductor which adjoins the interlayer is/are interposed between semiconductor layers or between a semiconductor and an electrode, (2) an amount of dopant in a p-type or n-type layer is least at a junction interface of p/i or n/i and increases gradually toward a junction interface of p/electrode or n/electrode, or (3) a p-type semiconductor layer being the same conductive type as the p-type semiconductor and having higher impurity density and/or an n-type semiconductor layer being the same conductive type as the n-type semiconductor layer and having higher impurity density is/are interposed between the p-type semiconductor layer and the electrode at the side of the p-type semiconductor layer and/or between the n-type semiconductor layer and the electrode at the side of the n-type semiconductor layer. According to the semiconductor device of the present invention (in the case of (1) or (2)), large Voc and electric current at a specific voltage can be obtained, further in the case of (3), photoelectric conversion efficiency can be improved.