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公开(公告)号：US07880545B1
公开(公告)日：2011-02-01
申请号：US12397118
申请日：2009-03-03
IPC分类号： H03F1/14
CPC分类号： H03F3/45475 , H03F1/14 , H03F1/34 , H03F3/3022 , H03F2200/153 , H03F2200/297
摘要： The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output terminal. The damping circuit adds a pole and a zero to the transfer function of the circuit. In one embodiment, the damping circuit modifies the effect of the output impedance of a load on the transfer function to increase the phase margin of the circuit such that the circuit remains stable over an increased range of output capacitor values.
摘要翻译： 本发明提供对电路的补偿。 在一个实施例中，补偿电路具有耦合到电路的输出端的第一端子和耦合以将输出电压反馈到内部节点的第二端子。 阻尼电路也可以耦合到输出端子。 阻尼电路向电路的传递函数添加极点和零点。 在一个实施例中，阻尼电路改变负载的输出阻抗对传递函数的影响，以增加电路的相位裕度，使得电路在输出电容器值的增加范围内保持稳定。
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2.发明授权Method for erasing a common mode current signal and transconductor assembly using such method 失效使用这种方法擦除共模电流信号和跨导体组件的方法
公开(公告)号：US5696457A
公开(公告)日：1997-12-09
申请号：US454649
申请日：1995-05-31
CPC分类号： H03F3/45964 , H03F3/45278 , H03F3/45717 , H03F2203/45024 , H03F2203/45068 , H03F2203/45078 , H03F2203/45394 , H03F2203/45648
摘要： A low-voltage transconductor circuit in which the common mode gain of a first transconductor stage is compensated by a second transconductor stage (connected in parallel with the first transconductor stage) which has no differential mode transconductance, and which is connected so that its common mode transconductance offsets the common mode transconductance of the stage. This greatly reduces the common mode current signal at the output, while avoiding the necessity for a current sink at the source of the input transistors.
摘要翻译： 一种低压跨导电路，其中第一跨导级的共模增益由不具有差分晶体跨导的第二跨导级（与第一跨导级并联连接）补偿，并且其连接使得其共模 跨导抵消了该级的共模跨导。 这大大降低了输出端的共模电流信号，同时避免了在输入晶体管的源极处的电流吸收器的必要性。
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公开(公告)号：US5430337A
公开(公告)日：1995-07-04
申请号：US105736
申请日：1993-08-12
CPC分类号： H03F1/3211 , H03F3/45076 , H03F3/45282
摘要： A transconductor stage for high-frequency filters of a type which comprises an input circuit portion having signal inputs and an output circuit portion, incorporates a pair of field-effect transistors having respective gate and source terminals in common, and has the output portion formed of a pair of bipolar transistors connected to the aforesaid field-effect transistors.
摘要翻译： 一种用于包括具有信号输入的输入电路部分和输出电路部分的类型的高频滤波器的跨导级，包括一对共同具有各自的栅极和源极端子的场效应晶体管，并且具有由 连接到上述场效应晶体管的一对双极晶体管。
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4.发明授权Transconductor circuit with high-linearity double input and active filter thereof 失效具有高线性双输入和有源滤波器的跨导电路
公开(公告)号：US5576646A
公开(公告)日：1996-11-19
申请号：US473533
申请日：1995-06-07
CPC分类号： H03F3/45076 , H03H11/0433 , H03F2200/261
摘要： The invention relates to a transconductor circuit with a double input and a single output, comprising two input transistors (M1, M2) whose primary conduction terminals (D1, S1, D2, S2) are respectively connected together; in this way, variations in load current and voltage can be made lower, thereby also lowering distortion from changes in their transconductance.
摘要翻译： 本发明涉及具有双输入和单输出的跨导电路，包括其一次导通端子（D1，S1，D2，S2）分别连接在一起的两个输入晶体管（M1，M2） 以这种方式，可以降低负载电流和电压的变化，从而也降低其跨导变化的变形。
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公开(公告)号：US07595745B1
公开(公告)日：2009-09-29
申请号：US11836619
申请日：2007-08-09
IPC分类号： H03M1/00
CPC分类号： H03K3/356113
摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a switch selectively couples an output node to a first reference voltage when the output node is to be in a first state based on the control signal. A source-follower circuit having a current source establishes a second reference voltage. A logic circuit coupled to the switch and the source-follower circuit and having a logic gate selectively discharges, in accordance with the control signal, the output node to the second reference voltage when the output node is to transition from the first state to a second state.
摘要翻译： 在将具有第一范围的第一逻辑信号转换成具有第二范围的第二逻辑信号的电路中，当输出节点将基于控制的第一状态时，开关选择性地将输出节点耦合到第一参考电压 信号。 具有电流源的源极跟随器电路建立第二参考电压。 耦合到开关和源极跟随器电路并且具有逻辑门的逻辑电路在输出节点要从第一状态转变到第二状态时，根据控制信号将输出节点选择性地放电到第二参考电压 州。
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公开(公告)号：US07511649B1
公开(公告)日：2009-03-31
申请号：US11846292
申请日：2007-08-28
申请人： Francesco Rezzi , Nicola Ghittori , Giovanni Antonio Cesura , Shafiq M. Jamal , Stefano Marchesi
发明人： Francesco Rezzi , Nicola Ghittori , Giovanni Antonio Cesura , Shafiq M. Jamal , Stefano Marchesi
IPC分类号： H03M1/66
CPC分类号： H03K17/6871 , H03K3/35613
摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second MOS transistor has a source coupled to the output node and a gate coupled to a bias voltage. A current source circuit selectively biases the second MOS transistor to act as part of a source-follower circuit when the output node is to be in a second state. Additionally, a memory circuit has an input coupled to the output node, and an output. The memory circuit is configured to temporarily store a Boolean value of the output node when the output node transitions from the first state to the second state. Further, a discharging circuit is coupled to the output node and a second reference voltage. The discharging circuit is configured to temporarily provide a discharging path between the output node and the second reference voltage when the output node is transitioning from the first state to the second state. The discharging circuit has a first input coupled to the output of the memory circuit and a second input coupled to a control signal. The control signal indicates that the output node is to transition from the first state to the second state.
摘要翻译： 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中，当输出节点将处于该状态时，第一金属氧化物半导体（MOS）晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 第二MOS晶体管具有耦合到输出节点的源极和耦合到偏置电压的栅极。 当输出节点处于第二状态时，电流源电路选择性地偏压第二MOS晶体管，以充当源跟随器电路的一部分。 另外，存储器电路具有耦合到输出节点的输入和输出。 存储器电路被配置为当输出节点从第一状态转换到第二状态时临时存储输出节点的布尔值。 此外，放电电路耦合到输出节点和第二参考电压。 放电电路被配置为当输出节点从第一状态转变到第二状态时临时提供输出节点与第二参考电压之间的放电路径。 放电电路具有耦合到存储器电路的输出的第一输入和耦合到控制信号的第二输入。 控制信号表示输出节点要从第一状态转换到第二状态。
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公开(公告)号：US6043943A
公开(公告)日：2000-03-28
申请号：US846782
申请日：1997-04-30
申请人： Francesco Rezzi , Giuseppe Patti
发明人： Francesco Rezzi , Giuseppe Patti
CPC分类号： G11B5/012 , G11B20/10009 , G11B5/09 , G11B2005/0016
摘要： A method and a circuit for correcting asymmetry in a response signal generated by a magneto-resistive head. The magneto-resistive head generates a response signal to transmit digital information read from a magnetic media storage device. The asymmetry is corrected in a negative feedback manner by squaring an output signal, modulating the squared output signal, and subtracting the modulated squared output signal from the response signal to generate the output signal. The circuit employs a differential amplifier as an input stage and a Gilbert multiplier circuit to square the output signal.
摘要翻译： 一种用于校正由磁阻头产生的响应信号中的不对称的方法和电路。 磁阻头产生响应信号以传送从磁性介质存储装置读取的数字信息。 通过平方输出信号，调制平方输出信号，以及从响应信号中减去经调制的平方输出信号以产生输出信号，以负反馈方式校正不对称性。 该电路采用差分放大器作为输入级和吉尔伯特乘法器电路对输出信号进行平方。
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公开(公告)号：US07629909B1
公开(公告)日：2009-12-08
申请号：US11836628
申请日：2007-08-09
IPC分类号： H03M1/00
CPC分类号： H03K19/00361 , H03K17/162 , H03M1/742
摘要： In a circuit to convert a voltage range of a control signal, a first switch selectively couples, based on the control signal, an output node to a first reference voltage when the output node is to be in a first state. A second switch selectively establishes, based on the control signal, a second reference voltage when the output node is to be in a second state, the second state being a logical complement of the first state. A feedback control loop is coupled to the output node to maintain the second reference voltage in response to voltage fluctuation at the output node. The feedback control loop includes a current mirror and a transistor coupled to the current mirror. The transistor is controlled by feedback from the output node to modify a biasing current established by the current mirror to thereby counteract the voltage fluctuation.
摘要翻译： 在转换控制信号的电压范围的电路中，当输出节点处于第一状态时，第一开关基于控制信号将输出节点选择性地耦合到第一参考电压。 当输出节点处于第二状态时，第二开关基于控制信号选择性地建立第二参考电压，第二状态是第一状态的逻辑补码。 反馈控制回路耦合到输出节点以响应于输出节点处的电压波动来维持第二参考电压。 反馈控制回路包括电流镜和耦合到电流镜的晶体管。 晶体管通过来自输出节点的反馈来控制，以修改由电流镜所建立的偏置电流，从而抵消电压波动。
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公开(公告)号：US07609186B1
公开(公告)日：2009-10-27
申请号：US11836584
申请日：2007-08-09
IPC分类号： H03K19/094
CPC分类号： H03K19/018528
摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second transistor selectively discharges the output node toward a second reference voltage via a resistor when the output node is to transition from the first state to a second state, the second state being a logical complement of the first state. A source-follower circuit has a source follower output coupled to the output node and has a dynamic current source, the dynamic current source having a control input coupled to the resistor. A third transistor selectively couples the source follower output to the dynamic current source when the output node is to be in the second state.
摘要翻译： 在将具有第一范围的第一逻辑信号转换成具有第二范围的第二逻辑信号的电路中，当输出节点处于第一状态时，第一晶体管选择性地将输出节点耦合到第一参考电压。 当输出节点要从第一状态转变到第二状态时，第二晶体管通过电阻器选择性地将输出节点放电到第二参考电压，第二状态是第一状态的逻辑补码。 源跟随器电路具有耦合到输出节点并具有动态电流源的源极跟随器输出，动态电流源具有耦合到电阻器的控制输入。 当输出节点处于第二状态时，第三晶体管选择性地将源极跟随器输出耦合到动态电流源。
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公开(公告)号：US07605608B1
公开(公告)日：2009-10-20
申请号：US11836571
申请日：2007-08-09
IPC分类号： H03K19/094
CPC分类号： H03K19/018521 , H03M1/742
摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second MOS transistor selectively discharges the output node toward a second reference voltage when the output node is to transition from the first state to a second state, the second state a logical complement of the first state. An output of a source-follower circuit, having a current source, is coupled to the output node. A third MOS transistor selectively couples the current source of the source-follower circuit to the second reference voltage when the output node is to be in the second state.
摘要翻译： 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中，当输出节点将处于该状态时，第一金属氧化物半导体（MOS）晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 当输出节点从第一状态转变到第二状态时，第二MOS晶体管选择性地将输出节点放电到第二参考电压，第二状态是第一状态的逻辑补码。 具有电流源的源跟随器电路的输出耦合到输出节点。 当输出节点处于第二状态时，第三MOS晶体管将源极跟随器电路的电流源选择性地耦合到第二参考电压。
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