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    Buffer architecture for biaxially textured structures and method of fabricating same
    7.
    发明授权
    Buffer architecture for biaxially textured structures and method of fabricating same 失效
    用于双轴织构结构的缓冲结构及其制造方法

    公开(公告)号：US06716795B2

    公开(公告)日：2004-04-06

    申请号：US09406190

    申请日：1999-09-27

    申请人： David P. Norton ,  Chan Park ,  Amit Goyal

    发明人： David P. Norton ,  Chan Park ,  Amit Goyal

    IPC分类号： H01B1200

    CPC分类号： C23C18/1216 ,  C21D8/12 ,  C21D2201/04 ,  C21D2201/05 ,  C23C14/028 ,  C23C18/14 ,  C30B5/00 ,  C30B23/02 ,  C30B25/02 ,  C30B29/16 ,  C30B29/22 ,  C30B29/225 ,  H01L39/2454 ,  H01L39/2461 ,  H01L39/248 ,  Y10S428/93

    摘要： The invention relates to an article with an improved buffer layer architecture comprising a substrate having a metal surface, and an epitaxial buffer layer on the surface of the substrate. The epitaxial buffer layer comprises at least one of the group consisting of ZrO2, HfO2, and compounds having at least one of Ca and a rare earth element stabilizing cubic phases of ZrO2 and/or HfO2. The article can also include a superconducting layer deposited on the epitaxial buffer layer. The article can also include an epitaxial capping layer between the epitaxial buffer layer and the superconducting layer. A method for preparing an epitaxial article comprises providing a substrate with a metal surface, depositing on the metal surface an epitaxial buffer layer comprising at least one material selected from the group consisting of ZrO2, HfO2, and compounds having at least one of Ca and a rare earth element stabilizing cubic phases of at least one of ZrO2 and HfO2. The epitaxial layer depositing step occurs in a vacuum with a background pressure of no more than 1×10−5 Torr. The method can further comprise depositing a superconducting layer on the epitaxial layer, and depositing an epitaxial capping layer between the epitaxial buffer layer and the superconducting layer.

    摘要翻译： 本发明涉及一种具有改进的缓冲层结构的制品，其包括具有金属表面的基底和在基底表面上的外延缓冲层。 外延缓冲层包括由ZrO 2，HfO 2和具有稳定立方相的ZrO 2和/或HfO 2的Ca和稀土元素中的至少一种的化合物中的至少一种。 该物品还可以包括沉积在外延缓冲层上的超导层。 该制品还可以包括在外延缓冲层和超导层之间的外延覆盖层。 一种用于制备外延物品的方法包括：向基底提供金属表面;在所述金属表面上沉积包含至少一种选自ZrO 2，HfO 2和至少一种Ca和 稀土元素稳定ZrO 2和HfO 2中的至少一种的立方相。 外延层沉积步骤在背景压力不超过1×10 -5乇的真空中进行。 该方法还可以包括在外延层上沉积超导层，以及在外延缓冲层和超导层之间沉积外延覆盖层。

    Method of producing biaxially textured buffer layers and related articles, devices and systems
    8.
    发明授权
    Method of producing biaxially textured buffer layers and related articles, devices and systems 有权
    生产双轴纹理缓冲层及相关物品，装置和系统的方法

    公开(公告)号：US06849580B2

    公开(公告)日：2005-02-01

    申请号：US10457184

    申请日：2003-06-09

    申请人： David P. Norton ,  Venkat Selvamanickam

    发明人： David P. Norton ,  Venkat Selvamanickam

    IPC分类号： C30B25/18 ,  C30B29/22 ,  H01L39/24 ,  H01B12/00 ,  H01F6/00 ,  H01L39/00

    CPC分类号： H01L39/2461 ,  C30B25/18 ,  C30B29/22 ,  Y10S428/93

    摘要： A superconductor article includes a substrate and a first buffer film disposed on the substrate. The first buffer film has a uniaxial crystal texture characterized (i) texture in a first crystallographic direction that extends out-of-plane of the first buffer film with no significant texture in a second direction that extends in-plane of the first buffer film, or (ii) texture in a first crystallographic direction that extends in-plane of the first buffer film with no significant texture in a second direction that extends out-of-plane of the first buffer film. A second buffer film is disposed on the first buffer film, the second buffer film having a biaxial crystal texture. A superconductor layer can be disposed on the second buffer film. Ion-beam assisted deposition (IBAD) can be used to deposit the second buffer film.

    摘要翻译： 超导体制品包括衬底和设置在衬底上的第一缓冲膜。 第一缓冲膜具有单轴晶体结构，其特征在于（i）沿着在第一缓冲膜的平面内延伸的第二方向上没有显着纹理的第一缓冲膜的平面外延伸的第一结晶方向的纹理， 或（ii）在第一缓冲膜的平面内延伸的第一结晶方向上的纹理，在第一缓冲膜的平面外延伸的第二方向上没有显着纹理。 第二缓冲膜设置在第一缓冲膜上，第二缓冲膜具有双轴晶体结构。 超导体层可以设置在第二缓冲膜上。 离子束辅助沉积（IBAD）可用于沉积第二缓冲膜。

    Method of physical vapor deposition of metal oxides on semiconductors
    9.
    发明授权
    Method of physical vapor deposition of metal oxides on semiconductors 失效
    金属氧化物在半导体上的物理气相沉积方法

    公开(公告)号：US06214712B1

    公开(公告)日：2001-04-10

    申请号：US09397719

    申请日：1999-09-16

    申请人： David P. Norton

    发明人： David P. Norton

    IPC分类号： H01L213205

    CPC分类号： H01L21/31604 ,  C23C14/08 ,  C23C14/22 ,  C23C14/28 ,  C30B23/02 ,  C30B29/16

    摘要： A process for growing a metal oxide thin film upon a semiconductor surface with a physical vapor deposition technique in a high-vacuum environment and a structure formed with the process involves the steps of heating the semiconductor surface and introducing hydrogen gas into the high-vacuum environment to develop conditions at the semiconductor surface which are favorable for growing the desired metal oxide upon the semiconductor surface yet is unfavorable for the formation of any native oxides upon the semiconductor. More specifically, the temperature of the semiconductor surface and the ratio of hydrogen partial pressure to water pressure within the vacuum environment are high enough to render the formation of native oxides on the semiconductor surface thermodynamically unstable yet are not so high that the formation of the desired metal oxide on the semiconductor surface is thermodynamically unstable. Having established these conditions, constituent atoms of the metal oxide to be deposited upon the semiconductor surface are directed toward the surface of the semiconductor by a physical vapor deposition technique so that the atoms come to rest upon the semiconductor surface as a thin film of metal oxide with no native oxide at the semiconductor surface/thin film interface. An example of a structure formed by this method includes an epitaxial thin film of (001)-oriented CeO2 overlying a substrate of (001) Ge.

    摘要翻译： 在高真空环境中使用物理气相沉积技术在半导体表面上生长金属氧化物薄膜的方法和由该方法形成的结构包括以下步骤：加热半导体表面并将氢气引入高真空环境 以在半导体表面上形成有利于在半导体表面上生长期望的金属氧化物的条件，但不利于在半导体上形成任何天然氧化物。 更具体地说，半导体表面的温度和真空环境中的氢分压与水压的比例足够高，使半导体表面上的天然氧化物的热力学不稳定形成，但不至于形成所需的 半导体表面上的金属氧化物是热力学不稳定的。 建立这些条件后，要沉积在半导体表面上的金属氧化物的成分原子通过物理气相沉积技术指向半导体的表面，使得原子作为金属氧化物的薄膜停留在半导体表面上 在半导体表面/薄膜界面处没有自然氧化物。 通过该方法形成的结构的实例包括覆盖（001）Ge的衬底上的（001）取向的CeO 2的外延薄膜。