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公开(公告)号:US20250101578A1
公开(公告)日:2025-03-27
申请号:US18975559
申请日:2024-12-10
Applicant: Applied Materials, Inc.
Inventor: Xinhai Han , Hang Yu , Kesong Hu , Kristopher R. Enslow , Masaki Ogata , Wenjiao Wang , Chuan Ying Wang , Chuanxi Yang , Joshua Maher , Phaik Lynn Leong , Grace Qi En Teong , Alok Jain , Nagarajan Rajagopalan , Deenesh Padhi , SeoYoung Lee
Abstract: Exemplary semiconductor structures may include a stack of layers overlying a substrate. The stack of layers may include a first portion of layers, a second portion of layers overlying the first portion of layers, and a third portion of layers overlying the second portion of layers. The first portion of layers, the second portion of layers, and the third portion of layers may include alternating layers of a silicon oxide material and a silicon nitride material. One or more apertures may be formed through the stack of layers. A lateral notch in each individual layer of silicon nitride material at an interface of the individual layer of silicon nitride material and an overlying layer of silicon oxide material may extend a distance less than or about 100% of a distance corresponding to a thickness of the individual layer of silicon nitride material.
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公开(公告)号:US11851759B2
公开(公告)日:2023-12-26
申请号:US18083173
申请日:2022-12-16
Applicant: Applied Materials, Inc.
Inventor: Shailendra Srivastava , Sai Susmita Addepalli , Nikhil Sudhindrarao Jorapur , Daemian Raj Benjamin Raj , Amit Kumar Bansal , Juan Carlos Rocha-Alvarez , Gregory Eugene Chichkanoff , Xinhai Han , Masaki Ogata , Kristopher Enslow , Wenjiao Wang
IPC: C23C16/455 , H01J37/32 , C23C16/50 , C23C16/458
CPC classification number: C23C16/45565 , C23C16/4583 , C23C16/45536 , C23C16/50 , H01J37/3244 , H01J37/32458 , H01J2237/3321
Abstract: A faceplate for a substrate process chamber comprises a first and second surface. The second surface is shaped such that the second surface includes a peak and a distance between the first and second surface varies across the width of the faceplate. The second surface of the faceplate is exposed to a processing volume of the process chamber. Further, the faceplate may be part of a lid assembly for the process chamber. The lid assembly may include a blocker plate facing the first surface of the faceplate. A distance between the blocker plate and the first surface is constant.
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公开(公告)号:US11339475B2
公开(公告)日:2022-05-24
申请号:US16678996
申请日:2019-11-08
Applicant: Applied Materials, Inc.
Inventor: Xinhai Han , Deenesh Padhi , Daemian Raj Benjamin Raj , Kristopher Enslow , Wenjiao Wang , Masaki Ogata , Sai Susmita Addepalli , Nikhil Sudhindrarao Jorapur , Gregory Eugene Chichkanoff , Shailendra Srivastava , Jonghoon Baek , Zakaria Ibrahimi , Juan Carlos Rocha-Alvarez , Tza-Jing Gung
IPC: C23C16/505 , C23C16/455 , H01L27/11524 , H01L27/1157 , H01L27/11578 , H01L27/11551 , C23C16/34 , H01J37/32 , C23C16/40
Abstract: An apparatus and a method for depositing a film layer that may have minimum contribution to overlay error after a sequence of deposition and lithographic exposure processes are provided. In one example, a method includes positioning a substrate on a substrate support in a process chamber, and flowing a deposition gas mixture comprising a silicon containing gas and a reacting gas to the process chamber through a showerhead having a convex surface facing the substrate support or a concave surface facing the substrate support in accordance with a stress profile of the substrate. A plasma is formed in the presence of the deposition gas mixture in the process chamber by applying an RF power to multiple coupling points of the showerhead that are symmetrically arranged about a center point of the showerhead. A deposition process is then performed on the substrate.
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公开(公告)号:US12195846B2
公开(公告)日:2025-01-14
申请号:US16986632
申请日:2020-08-06
Applicant: Applied Materials, Inc.
Inventor: Xinhai Han , Hang Yu , Kesong Hu , Kristopher R. Enslow , Masaki Ogata , Wenjiao Wang , Chuan Ying Wang , Chuanxi Yang , Joshua Maher , Phaik Lynn Leong , Grace Qi En Teong , Alok Jain , Nagarajan Rajagopalan , Deenesh Padhi , SeoYoung Lee
Abstract: Exemplary methods of forming semiconductor structures may include forming a silicon oxide layer from a silicon-containing precursor and an oxygen-containing precursor. The methods may include forming a silicon nitride layer from a silicon-containing precursor, a nitrogen-containing precursor, and an oxygen-containing precursor. The silicon nitride layer may be characterized by an oxygen concentration greater than or about 5 at. %. The methods may also include repeating the forming a silicon oxide layer and the forming a silicon nitride layer to produce a stack of alternating layers of silicon oxide and silicon nitride.
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公开(公告)号:US20240243018A1
公开(公告)日:2024-07-18
申请号:US18623690
申请日:2024-04-01
Applicant: Applied Materials, Inc.
Inventor: Wenjiao Wang , Joshua Maher , Xinhai Han , Deenesh Padhi , Tza-Jing Gung
IPC: H01L21/66 , G03F7/00 , G06F30/398
CPC classification number: H01L22/12 , G06F30/398 , G03F7/705
Abstract: Methods and systems are described for generating assessment maps. A method includes receiving a first data set reflecting distortions associated with a substrate and generating a second data set reflecting reduced noise in the distortions of the first data set. A third data set is generated by projecting a plurality of direction components associated with the second data set to a radial direction and a stress or strain map is generated indicating at least one of stress or strain exhibited by the substrate by determining a magnitude associated with a subset of the third data set.
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公开(公告)号:US20230238289A1
公开(公告)日:2023-07-27
申请号:US18130500
申请日:2023-04-04
Applicant: Applied Materials, Inc.
Inventor: Wenjiao Wang , Joshua Maher , Xinhai Han , Deenesh Padhi , Tza-Jing Gung
IPC: H01L21/66 , G06F30/398
CPC classification number: H01L22/12 , G06F30/398 , G03F7/705
Abstract: Methods and systems are described for generating assessment maps. A method includes receiving a first vector map comprising a first set of vectors each indicating a distortion of a particular location on a substrate and generating a second vector map indicating a change in direction of a magnitude of the distortion of the particular location on the substrate. The method further includes generating a third vector map comprising vectors reflecting reduced noise in distortions across the plurality of locations on the substrate and generating a fourth vector map projecting a direction component of each vector component in the third set of vectors to a radial direction. The method further includes generating a fifth vector map by grouping the vectors of the fourth set of vectors and determining a magnitude associated with each group of vectors.
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公开(公告)号:US12110590B2
公开(公告)日:2024-10-08
申请号:US18381534
申请日:2023-10-18
Applicant: Applied Materials, Inc.
Inventor: Shailendra Srivastava , Sai Susmita Addepalli , Nikhil Sudhindrarao Jorapur , Daemian Raj Benjamin Raj , Amit Kumar Bansal , Juan Carlos Rocha-Alvarez , Gregory Eugene Chichkanoff , Xinhai Han , Masaki Ogata , Kristopher Enslow , Wenjiao Wang
IPC: C23C16/455 , C23C16/458 , C23C16/50 , H01J37/32
CPC classification number: C23C16/45565 , C23C16/45536 , C23C16/4583 , C23C16/50 , H01J37/3244 , H01J37/32458 , H01J2237/3321
Abstract: A faceplate for a substrate process chamber comprises a first and second surface. The second surface is shaped such that the second surface includes a peak and a distance between the first and second surface varies across the width of the faceplate. The second surface of the faceplate is exposed to a processing volume of the process chamber. Further, the faceplate may be part of a lid assembly for the process chamber. The lid assembly may include a blocker plate facing the first surface of the faceplate. A distance between the blocker plate and the first surface is constant.
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公开(公告)号:US20210040607A1
公开(公告)日:2021-02-11
申请号:US16986632
申请日:2020-08-06
Applicant: Applied Materials, Inc.
Inventor: Xinhai Han , Hang Yu , Kesong Hu , Kristopher Enslow , Masaki Ogata , Wenjiao Wang , Chuan Ying Wang , Chuanxi Yang , Joshua Maher , Phaik Lynn Leong , Qi En Teong , Alok Jain , Nagarajan Rajagopalan , Deenesh Padhi
IPC: C23C16/34 , H01L27/11524 , H01L27/11551 , H01L27/1157 , H01L27/11578 , C23C16/40
Abstract: Exemplary methods of forming semiconductor structures may include forming a silicon oxide layer from a silicon-containing precursor and an oxygen-containing precursor. The methods may include forming a silicon nitride layer from a silicon-containing precursor, a nitrogen-containing precursor, and an oxygen-containing precursor. The silicon nitride layer may be characterized by an oxygen concentration greater than or about 5 at. %. The methods may also include repeating the forming a silicon oxide layer and the forming a silicon nitride layer to produce a stack of alternating layers of silicon oxide and silicon nitride.
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公开(公告)号:US11948846B2
公开(公告)日:2024-04-02
申请号:US18130500
申请日:2023-04-04
Applicant: Applied Materials, Inc.
Inventor: Wenjiao Wang , Joshua Maher , Xinhai Han , Deenesh Padhi , Tza-Jing Gung
IPC: H01L21/66 , G03F7/00 , G06F30/398
CPC classification number: H01L22/12 , G06F30/398 , G03F7/705
Abstract: Methods and systems are described for generating assessment maps. A method includes receiving a first vector map comprising a first set of vectors each indicating a distortion of a particular location on a substrate and generating a second vector map indicating a change in direction of a magnitude of the distortion of the particular location on the substrate. The method further includes generating a third vector map comprising vectors reflecting reduced noise in distortions across the plurality of locations on the substrate and generating a fourth vector map projecting a direction component of each vector component in the third set of vectors to a radial direction. The method further includes generating a fifth vector map by grouping the vectors of the fourth set of vectors and determining a magnitude associated with each group of vectors.
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公开(公告)号:US11637043B2
公开(公告)日:2023-04-25
申请号:US17087976
申请日:2020-11-03
Applicant: Applied Materials, Inc.
Inventor: Wenjiao Wang , Joshua Maher , Xinhai Han , Deenesh Padhi , Tza-Jing Gung
IPC: H01L21/66 , G06F30/398 , G03F7/20
Abstract: Methods, systems, and non-transitory computer readable medium are described for generating assessment maps for corrective action. A method includes receiving a first vector map including a first set of vectors each indicating a distortion of a particular location of a plurality of locations on a substrate. The method further includes generating a second vector map including a second set of vectors by rotating a position of each vector in the first set of vectors. The method further includes generating a third vector map including a third set of vectors based on vectors in the second set of vectors and corresponding vectors in the first set of vectors. The method further includes generating a fourth vector map by subtracting each vector of the third set of vectors from a corresponding vector in the first set of vectors. The fourth vector map indicates a planar component of the first vector map.
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