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    Dielectric-metal stack for 3D flash memory application
    4.
    发明授权
    Dielectric-metal stack for 3D flash memory application 有权

    公开(公告)号：US09972487B2

    公开(公告)日：2018-05-15

    申请号：US14591609

    申请日：2015-01-07

    Applicant: Applied Materials, Inc.

    Inventor： Xinhai Han ,  Nagarajan Rajagopalan ,  Sung Hyun Hong ,  Bok Hoen Kim ,  Mukund Srinivasan

    IPC: H01L21/02 ,  H01L27/11556 ,  H01L27/11582

    CPC classification number: H01L21/02274 ,  H01L21/02164 ,  H01L27/11556 ,  H01L27/11582

    Abstract: A method is provided for forming a stack of film layers for use in 3D memory devices. The method starts with providing a substrate in a processing chamber of a deposition reactor. Then one or more process gases suitable for forming a dielectric layer are supplied into the processing chamber of the deposition reactor forming a dielectric layer on the substrate. Then one or more process gases suitable for forming a metallic layer are supplied into the processing chamber of the deposition reactor forming a metallic layer on the dielectric layer. Then one or more process gases suitable for forming a metallic nitride adhesion layer are supplied into the processing chamber of the deposition reactor forming a metallic nitride adhesion layer on the metallic layer. The sequence is then repeated to form a desired number of layers.

    Gate stack materials for semiconductor applications for lithographic overlay improvement
    9.
    发明授权
    Gate stack materials for semiconductor applications for lithographic overlay improvement 有权
    用于半导体应用的栅极叠层材料用于光刻覆盖改进

    公开(公告)号：US09490116B2

    公开(公告)日：2016-11-08

    申请号：US14879043

    申请日：2015-10-08

    Applicant: Applied Materials, Inc.

    Inventor： Michael Tsiang ,  Praket P. Jha ,  Xinhai Han ,  Nagarajan Rajagopalan ,  Bok Hoen Kim ,  Tsutomu Kiyohara ,  Subbalakshmi Sreekala

    IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L27/115

    CPC classification number: H01L21/0217 ,  H01L21/02274 ,  H01L27/11582

    Abstract: Embodiments of the disclosure provide methods and system for manufacturing film layers with minimum lithographic overlay errors on a semiconductor substrate. In one embodiment, a method for forming a film layer on a substrate includes supplying a deposition gas mixture including a silicon containing gas and a reacting gas onto a substrate disposed on a substrate support in a processing chamber, forming a plasma in the presence of the depositing gas mixture in the processing chamber, applying current to a plasma profile modulator disposed in the processing chamber while supplying the depositing gas mixture into the processing chamber, and rotating the substrate while depositing a film layer on the substrate.

    Abstract translation: 本公开的实施例提供了在半导体衬底上制造具有最小光刻重叠误差的膜层的方法和系统。 在一个实施例中，用于在衬底上形成膜层的方法包括将包含含硅气体和反应气体的沉积气体混合物供给到设置在处理室中的衬底支撑体上的衬底上，在存在 在处理室中沉积气体混合物，将电流施加到设置在处理室中的等离子体轮廓调制器，同时将沉积气体混合物供应到处理室中，并且在衬底上沉积膜层的同时旋转衬底。

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