公开(公告)号：US08492771B2

公开(公告)日：2013-07-23

申请号：US11862661

申请日：2007-09-27

申请人： Michael Rüb ,  Michael Treu ,  Armin Willmeroth ,  Franz Hirler

发明人： Michael Rüb ,  Michael Treu ,  Armin Willmeroth ,  Franz Hirler

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/267 ,  H01L29/41775 ,  H01L29/66068

摘要： A semiconductor device includes a first semiconductor substrate of a first band-gap material and a second semiconductor substrate of a second band-gap material. The second band-gap material has a lower band-gap than the first band-gap material. A heterojunction is formed between the first semiconductor substrate and the second semiconductor substrate substantially in a first plane. The semiconductor device further includes, in a cross-section which is perpendicular to the first plane, a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type both of which extend from the second semiconductor substrate at least partially into the first semiconductor substrate. The first and second semiconductor regions are spaced in the first semiconductor substrate from each other in a direction parallel to the first plane by a first distance which is arranged in an area proximate to the heterojunction and which is larger than a second distance which is arranged in an area distal to the heterojunction.

摘要翻译： 半导体器件包括第一带隙材料的第一半导体衬底和第二带隙材料的第二半导体衬底。 第二带隙材料具有比第一带隙材料低的带隙。 基本上在第一平面中，在第一半导体衬底和第二半导体衬底之间形成异质结。 所述半导体器件还包括垂直于所述第一平面的横截面，所述第一导电类型的第一半导体区域和所述第一导电类型的第二半导体区域从所述第二半导体衬底至少部分地延伸 进入第一半导体衬底。 第一和第二半导体区域在第一半导体衬底中沿平行于第一平面的方向彼此间隔开第一距离，第一距离布置在接近异质结的区域中，并且大于第二距离 远离异质结的区域。

公开(公告)号：US07459365B2

公开(公告)日：2008-12-02

申请号：US11540922

申请日：2006-09-29

申请人： Michael Rüb ,  Herbert Schäfer ,  Armin Willmeroth ,  Anton Mauder ,  Stefan Sedlmaier ,  Roland Rupp ,  Manfred Pippan ,  Hans Weber ,  Frank Pfirsch ,  Franz Hirler ,  Hans-Joachim Schulze

发明人： Michael Rüb ,  Herbert Schäfer ,  Armin Willmeroth ,  Anton Mauder ,  Stefan Sedlmaier ,  Roland Rupp ,  Manfred Pippan ,  Hans Weber ,  Frank Pfirsch ,  Franz Hirler ,  Hans-Joachim Schulze

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/76224 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/66734 ,  H01L29/7804 ,  H01L29/7849

摘要： The fabrication of a semiconductor component having a semiconductor body in which is arranged a very thin dielectric layer having sections which run in the vertical direction and which extend very deeply into the semiconductor body is disclosed. In one method a trench is formed in a drift zone region proceeding from the front side of a semiconductor body, a sacrificial layer is produced on at least a portion of the sidewalls of the trench and at least a portion of the trench is filled with a semiconductor material which is chosen such that the quotient of the net dopant charge of the semiconductor material in the trench and the total area of the sacrificial layer on the sidewalls of the trench between the semiconductor material and the drift zone region is less than the breakdown charge of the semiconductor material, and the sacrificial layer is replaced with a dielectric.

摘要翻译： 公开了具有半导体主体的半导体部件的制造，其中布置有具有在垂直方向上延伸并且非常深地延伸到半导体本体中的截面的非常薄的电介质层。 在一种方法中，在从半导体主体的前侧开始的漂移区域中形成沟槽，在沟槽的至少一部分侧壁上产生牺牲层，并且沟槽的至少一部分填充有 半导体材料被选择为使得沟槽中的半导体材料的净掺杂剂电荷的商和半导体材料和漂移区域之间的沟槽的侧壁上的牺牲层的总面积小于击穿电荷 的半导体材料，并且牺牲层被电介质代替。

公开(公告)号：US08431988B2

公开(公告)日：2013-04-30

申请号：US11262483

申请日：2005-10-28

申请人： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schäffer

发明人： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schäffer

IPC分类号： H01L29/66

CPC分类号： H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

摘要： A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.

摘要翻译： 横向沟槽晶体管具有半导体本体，其具有嵌入与半导体本体隔离的栅电极的源极区，源极接触，体区，漏极区和栅极沟槽。 重掺杂半导体区域设置在体区内或与其相邻，并且与源极接触电连接，并且其掺杂剂类型对应于身体区域。

公开(公告)号：US20120305993A1

公开(公告)日：2012-12-06

申请号：US13484490

申请日：2012-05-31

申请人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

发明人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

IPC分类号： H01L27/088

CPC分类号： H01L29/7813 ,  H01L27/088 ,  H01L27/098 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/7803 ,  H01L29/7831

摘要： A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

摘要翻译： 半导体器件包括栅极端子，至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件，所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件，所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管，所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间，并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

公开(公告)号：US20090085064A1

公开(公告)日：2009-04-02

申请号：US11862661

申请日：2007-09-27

申请人： Michael Rueb ,  Michael Treu ,  Armin Willmeroth ,  Franz Hirler

发明人： Michael Rueb ,  Michael Treu ,  Armin Willmeroth ,  Franz Hirler

IPC分类号： H01L29/778 ,  H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/267 ,  H01L29/41775 ,  H01L29/66068

摘要： A semiconductor device includes a first semiconductor substrate of a first band-gap material and a second semiconductor substrate of a second band-gap material. The second band-gap material has a lower band-gap than the first band-gap material. A heterojunction is formed between the first semiconductor substrate and the second semiconductor substrate substantially in a first plane. The semiconductor device further includes, in a cross-section which is perpendicular to the first plane, a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type both of which extend from the second semiconductor substrate at least partially into the first semiconductor substrate. The first and second semiconductor regions are spaced in the first semiconductor substrate from each other in a direction parallel to the first plane by a first distance which is arranged in an area proximate to the heterojunction and which is larger than a second distance which is arranged in an area distal to the heterojunction.

摘要翻译： 半导体器件包括第一带隙材料的第一半导体衬底和第二带隙材料的第二半导体衬底。 第二带隙材料具有比第一带隙材料低的带隙。 基本上在第一平面中在第一半导体衬底和第二半导体衬底之间形成异质结。 所述半导体器件还包括垂直于所述第一平面的横截面，所述第一导电类型的第一半导体区域和所述第一导电类型的第二半导体区域从所述第二半导体衬底至少部分地延伸 进入第一半导体衬底。 第一和第二半导体区域在第一半导体衬底中沿平行于第一平面的方向彼此间隔开第一距离，第一距离布置在接近异质结的区域中，并且大于第二距离 远离异质结的区域。

公开(公告)号：US08803205B2

公开(公告)日：2014-08-12

申请号：US13484490

申请日：2012-05-31

申请人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

发明人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L27/088 ,  H01L27/098 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/7803 ,  H01L29/7831

摘要： A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

摘要翻译： 半导体器件包括栅极端子，至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件，所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件，所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管，所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间，并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

公开(公告)号：US08569842B2

公开(公告)日：2013-10-29

申请号：US13275151

申请日：2011-10-17

申请人： Rolf Weis ,  Franz Hirler ,  Matthias Stecher ,  Armin Willmeroth ,  Gerald Deboy ,  Martin Feldtkeller

发明人： Rolf Weis ,  Franz Hirler ,  Matthias Stecher ,  Armin Willmeroth ,  Gerald Deboy ,  Martin Feldtkeller

IPC分类号： H01L27/06 ,  H01L27/088 ,  H01L27/098 ,  H01L29/161 ,  H01L29/20 ,  H01L29/778 ,  H01L29/788

CPC分类号： H01L27/0207 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0623 ,  H01L27/0629 ,  H01L27/0727 ,  H01L27/088 ,  H01L27/0883 ,  H01L27/0886 ,  H01L27/098 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/78 ,  H01L29/7817 ,  H01L29/7824 ,  H01L29/7825 ,  H01L29/7835 ,  H01L29/7838 ,  H03K17/06

摘要： A semiconductor device arrangement includes a first semiconductor device having a load path, and a number of second transistors, each having a load path between a first and a second load terminal and a control terminal. The second transistors have their load paths connected in series and connected in series to the load path of the first transistor. Each of the second transistors has its control terminal connected to the load terminal of one of the other second transistors. One of the second transistors has its control terminal connected to one of the load terminals of the first semiconductor device.

摘要翻译： 半导体器件布置包括具有负载路径的第一半导体器件和多个第二晶体管，每个具有第一和第二负载端子与控制端子之间的负载路径。 第二晶体管的负载路径串联连接并与第一晶体管的负载路径串联连接。 每个第二晶体管的控制端连接到其它第二晶体管的负载端子。 第二晶体管中的一个具有其控制端子连接到第一半导体器件的负载端子之一。

公开(公告)号：US07943987B2

公开(公告)日：2011-05-17

申请号：US11874591

申请日：2007-10-18

申请人： Armin Willmeroth ,  Anton Mauder ,  Franz Hirler ,  Stefan Sedlmaier ,  Frank Pfirsch

发明人： Armin Willmeroth ,  Anton Mauder ,  Franz Hirler ,  Stefan Sedlmaier ,  Frank Pfirsch

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7804

摘要： A semiconductor component has a drift zone and a drift control zone, a drift control zone dielectric, which is arranged in sections between the drift zone and the drift control zone, and has a first and a second connection zone, which are doped complementarily with respect to one another and which form a pn junction between the drift control zone and a section of the drift zone.

摘要翻译： 半导体部件具有漂移区和漂移控制区，漂移控制区电介质，其布置在漂移区和漂移控制区之间的部分中，并且具有第一和第二连接区，其相互掺杂互补 并且在漂移控制区域和漂移区段的一部分之间形成pn结。

公开(公告)号：US07825467B2

公开(公告)日：2010-11-02

申请号：US12241808

申请日：2008-09-30

申请人： Armin Willmeroth ,  Anton Mauder ,  Franz Hirler

发明人： Armin Willmeroth ,  Anton Mauder ,  Franz Hirler

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L27/088 ,  H01L27/0629 ,  H01L29/42356 ,  H01L29/4916 ,  H01L29/7828 ,  H03K17/567 ,  H03K2017/6875 ,  H03K2217/0036

摘要： A description is given of a normally on semiconductor component having a drift zone, a drift control zone and a drift control zone dielectric arranged between the drift zone and the drift control zone.

摘要翻译： 给出了具有漂移区，漂移控制区和布置在漂移区和漂移控制区之间的漂移控制区电介质的常规半导体元件的描述。

公开(公告)号：US20090218621A1

公开(公告)日：2009-09-03

申请号：US11996906

申请日：2006-07-27

申请人： Frank Pfirsch ,  Anton Mauder ,  Armin Willmeroth ,  Hans-Joachim Schulze ,  Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Arunjai Mittal

发明人： Frank Pfirsch ,  Anton Mauder ,  Armin Willmeroth ,  Hans-Joachim Schulze ,  Stefan Sedlmaier ,  Markus Zundel ,  Franz Hirler ,  Arunjai Mittal

IPC分类号： H01L29/78 ,  H01L27/06 ,  H01L29/739

CPC分类号： H01L29/7803 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4916 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.

摘要翻译： 具有漂移区域和漂移控制区域的半导体部件。 一个实施例包括半导体本体中具有第一导电类型的漂移区的半导体本体。 由半导体材料组成的漂移控制区域至少部分地布置成与半导体本体中的漂移区域相邻。 在漂移区域和漂移控制区域之间布置积累电介质。