Abstract:
In a method of in situ controlling the degree of fullness of wide lines in a damascene structure, an optical endpoint detection signal is analyzed so as to determine a time interval of substantially constant signal amplitude. The time interval is then used as a measure of the metal filled in a wide line in a damascene structure. By correlating the length of the time interval to at least one process parameter involved in the formation of the damascene structure, the degree of fullness of lines in the damascene structure may be controlled to maintain within a predefined allowable range.
Abstract:
In a new method of plating metal onto dielectric layers including small diameter vias and large diameter trenches, a surface roughness is created at least on non-patterned regions of the dielectric layer to enhance the uniformity of material removal in a subsequent chemical mechanical polishing (CMP) process.
Abstract:
By providing two or more consumable electrodes within a single reactor vessel, an alloy having a high degree of chemical ordering may be deposited in situ in that the current flows of the individual consumable electrodes are controlled to obtain a substantially layered deposition of the two or more metals. Hence, especially in copper-based metallization layers, the advantage of enhanced resistance against electromigration offered by alloys may be achieved without unduly reducing the overall conductivity.
Abstract:
In an electroplating apparatus for semiconductor wafers, the currents to each of a plurality of contact portions contacting the wafer edge are individually adjustable and/or a parameter indicative of the current flow in each contact portion may be determined. Moreover, for precise control of the currents, means are provided for monitoring the currents.
Abstract:
By providing two or more consumable electrodes within a single reactor vessel, an alloy having a high degree of chemical ordering may be deposited in situ in that the current flows of the individual consumable electrodes are controlled to obtain a substantially layered deposition of the two or more metals. Hence, especially in copper-based metallization layers, the advantage of enhanced resistance against electromigration offered by alloys may be achieved without unduly reducing the overall conductivity.
Abstract:
In a method of forming damascene metallization lines on a substrate by electroplating and chemical mechanical polishing, the metal layer thickness profile is shaped in correspondence to the removal rate during the chemical mechanical polishing. Thus, any non-uniformity of the chemical mechanical polishing process may be compensated for by appropriately depositing the metal layer so that erosion and dishing of the finally obtained metal lines are within tightly selected manufacturing tolerances.
Abstract:
Contact elements in the contact level of a semiconductor device may be formed on the basis of a selective deposition technique, such as electroless plating, wherein an efficient planarization of the contact level is achieved without subjecting the contact elements to undue mechanical stress. In some illustrative embodiments, an overfilling of the contact openings may be reliably avoided and the planarization of the surface topography is accomplished on the basis of a non-critical polishing process. In other cases, electrochemical etch techniques are applied in combination with a conductive sacrificial current distribution layer in order to remove any excess material of the contact elements without inducing undue mechanical stress.
Abstract:
By suppressing the presence of free oxygen during a cleaning process and a subsequent electrochemical deposition of a seed layer, the quality of a corresponding interface between the barrier material and the seed layer may be enhanced, thereby also improving performance and the characteristics of the finally obtained metal region. Thus, by identifying free oxygen as a main source for negatively affecting the characteristics of metals during a “direct on barrier” plating process, efficient strategies have been developed and are disclosed herein to provide a reliable technique for volume production of sophisticated semiconductor devices.
Abstract:
By appropriately designing a plurality of deposition steps and intermediate sputter processes, the formation of a barrier material within a via opening may be accomplished on the basis of a highly efficient process strategy that readily integrates conductive cap layers formed above metal-containing regions into well-approved process sequences.
Abstract:
In sophisticated metallization systems, air gaps may be formed on the basis of a self-aligned patterning regime during which the conductive cap material of metal lines may be protected by providing one or more materials, which may subsequently be removed. Consequently, the etch behavior and the electrical characteristics of metal lines during the self-aligned patterning regime may be individually adjusted.