公开(公告)号：US20250104638A1

公开(公告)日：2025-03-27

申请号：US18294535

申请日：2023-03-31

Applicant: Chongqing BOE Display Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Xinyu WEI ,  Xuebin YUAN ,  Gang WANG ,  Qiang FU

IPC: G09G3/3258

Abstract: A display apparatus and a pixel circuit. The pixel circuit includes: a first storage sub-circuit, connected between a first node and a second node; a data writing sub-circuit, configured to charge the second node; a driving sub-circuit, configured to control connection or disconnection between a third node and a fourth node under control of the first node; a compensation sub-circuit, configured to control connection or disconnection between the first node and the fourth node under control of a first scan signal end; a luminous control sub-circuit, configured to control connection or disconnection between a first power end and the third node under control of a first luminous control signal end, and further configured to control connection or disconnection between the fourth node and a first electrode of a sub-pixel under control of a second luminous control signal. The present disclosure can improve display effect.

公开(公告)号：US20240233601A9

公开(公告)日：2024-07-11

申请号：US18548184

申请日：2022-07-13

Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Gang WANG ,  Kai ZHANG ,  Xinyu WEI ,  Qiang FU ,  Xingrui CAI

IPC: G09G3/3225

CPC classification number: G09G3/3225 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0247

Abstract: In the pixel circuit, the data writing-in circuit is configured to control to connect the data line and the second terminal of the driving circuit under the control of a first scanning signal provided by the first scanning line; the compensation control circuit is configured to control to connect the first terminal of the driving circuit and the connection node under the control of a second scanning signal provided by the second scanning line; the first control circuit is configured to control to connect the control terminal of the driving circuit and the connection node under the control of the first scanning signal.

公开(公告)号：US20170033192A1

公开(公告)日：2017-02-02

申请号：US14913581

申请日：2015-07-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Longyan WANG ,  Yongqian LI ,  Kun CAO ,  Quanhu LI ,  Jingwen YIN ,  Baoxia ZHANG ,  Cuili GAI ,  Zhongyuan WU ,  Gang WANG

IPC: H01L29/45 ,  H01L29/22 ,  H01L29/20 ,  H01L29/786 ,  H01L21/4763 ,  H01L29/423 ,  H01L21/285 ,  H01L21/443 ,  H01L21/3213 ,  H01L29/24 ,  H01L29/66

CPC classification number: H01L29/45 ,  H01L21/28575 ,  H01L21/32134 ,  H01L21/443 ,  H01L21/47635 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/22 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66522 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78681 ,  H01L29/7869

Abstract: A thin film transistor, a manufacturing method thereof, and a display device are provided. The thin film transistor includes a gate electrode (21), an active layer (23), a source electrode (241) and a drain electrode (242). The source electrode (241) and the drain electrode (242) are formed of at least two materials, the forming materials of the source electrode (241) and the drain electrode (242) can create a cell reaction in a corresponding etching solution so as to be etched, and material of the active layer (23) is not corroded by the etching solution. With the thin film transistor and manufacturing method thereof according to embodiments of the invention, a problem that an active layer is liable to be corroded in an etching procedure of a source electrode and a drain electrode can be solved, and thus the thin film transistor device can be manufactured by using a back channel etch process. Consequently, the process number for manufacture of the thin film transistor is decreased, and the manufacturing cost is saved.

Abstract translation: 提供薄膜晶体管，其制造方法和显示装置。 薄膜晶体管包括栅电极（21），有源层（23），源电极（241）和漏电极（242）。 源极（241）和漏电极（242）由至少两种材料形成，源电极（241）和漏电极（242）的形成材料可以在相应的蚀刻溶液中产生电池反应，从而 被蚀刻，并且有源层（23）的材料不被蚀刻溶液腐蚀。 利用根据本发明的实施例的薄膜晶体管及其制造方法，可以解决在源电极和漏电极的蚀刻过程中有源层易于腐蚀的问题，因此薄膜晶体管器件 可以通过使用背沟道蚀刻工艺来制造。 因此，薄膜晶体管的制造工序减少，节省了制造成本。

公开(公告)号：US20150318309A1

公开(公告)日：2015-11-05

申请号：US14377946

申请日：2013-12-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yanzhao LI ,  Gang WANG ,  Jingang FANG

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/24 ,  H01L21/324 ,  H01L29/04 ,  H01L21/02 ,  H01L21/477 ,  H01L21/461 ,  H01L29/786 ,  H01L29/20

CPC classification number: H01L27/1222 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/461 ,  H01L21/477 ,  H01L27/1259 ,  H01L29/04 ,  H01L29/20 ,  H01L29/24 ,  H01L29/26 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78681 ,  H01L29/78693 ,  H01L29/78696

Abstract: A thin film transistor is provided. An active layer (3) of the thin film transistor is made of an amorphous phosphide semiconductor material. Due to high carrier mobility of the phosphide semiconductor material, a thin film transistor with a high carrier mobility can be obtained by employing the amorphous phosphide semiconductor material to prepare the active layer of the thin film transistor. A method for manufacturing such a thin film transistor, and an array substrate and a display panel each comprising such a thin film transistor, are further provided.

Abstract translation: 提供薄膜晶体管。 薄膜晶体管的有源层（3）由非晶磷化物半导体材料制成。 由于磷化物半导体材料的高载流子迁移率，通过采用非晶磷化物半导体材料制备薄膜晶体管的有源层，可以获得具有高载流子迁移率的薄膜晶体管。 还提供了一种制造这种薄膜晶体管的方法，以及包括这种薄膜晶体管的阵列基板和显示面板。

公开(公告)号：US20240135872A1

公开(公告)日：2024-04-25

申请号：US18548184

申请日：2022-07-12

Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Gang WANG ,  Kai ZHANG ,  Xinyu WEI ,  Qiang FU ,  Xingrui CAI

IPC: G09G3/3225

CPC classification number: G09G3/3225 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0247

Abstract: In the pixel circuit, the data writing-in circuit is configured to control to connect the data line and the second terminal of the driving circuit under the control of a first scanning signal provided by the first scanning line; the compensation control circuit is configured to control to connect the first terminal of the driving circuit and the connection node under the control of a second scanning signal provided by the second scanning line; the first control circuit is configured to control to connect the control terminal of the driving circuit and the connection node under the control of the first scanning signal.

公开(公告)号：US20160027811A1

公开(公告)日：2016-01-28

申请号：US14430138

申请日：2014-05-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yanzhao LI ,  Gang WANG ,  Chunsheng JIANG ,  Jingfei FANG ,  Jingang FANG

IPC: H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/786 ,  H01L29/06

CPC classification number: H01L27/1229 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/0684 ,  H01L29/24 ,  H01L29/242 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: Disclosed are a thin film transistor, an array substrate and a display device. The thin film transistor comprises a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode, wherein the active layer comprises at least two layers of semiconductor thin films, and the at least two layers of semiconductor thin films comprise at least one layer of monocrystalline semiconductor thin film.

Abstract translation: 公开了一种薄膜晶体管，阵列基板和显示装置。 薄膜晶体管包括栅电极，栅绝缘层，有源层，源电极和漏电极，其中有源层包括至少两层半导体薄膜，并且至少两层半导体薄膜 包括至少一层单晶半导体薄膜。

公开(公告)号：US20240292700A1

公开(公告)日：2024-08-29

申请号：US18560687

申请日：2021-10-22

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Erlong SONG ,  Hailong YAN ,  Kai ZHANG ,  Gang WANG ,  Xinyu WEI ,  Yagui GAO ,  Xingrui CAI

IPC: H10K59/35 ,  H10K59/122 ,  H10K102/00

CPC classification number: H10K59/353 ,  H10K59/122 ,  H10K59/352 ,  H10K2102/351

Abstract: A display panel comprises: a base substrate; a first electrode layer, which is located on one side of the base substrate, and comprises a plurality of first electrodes; a pixel defining layer, which is located on the side of the first electrode layer that faces away from the base substrate, and comprises a plurality of sub-pixel opening regions; a common layer, which is located on the sides of the first electrodes that face away from the base substrate, covers the pixel defining layer, and is used for transferring a hole or an electron; and a second electrode layer, which is located on the side of the common layer that faces away from the base substrate. The display panel further comprises an extension structure, which is located on the side of the pixel defining layer that faces away from the base substrate, is located between adjacent sub-pixel opening regions.

公开(公告)号：US20190064594A1

公开(公告)日：2019-02-28

申请号：US15966348

申请日：2018-04-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI BOE DISPLAY LIGHTING CO., LTD.

Inventor： Gang WANG

IPC: G02F1/1335 ,  E05D5/12 ,  F16M11/08

Abstract: An attaching apparatus is provided and includes: a base and a cover pivotally connected to the base. The base includes a to-be-attached object positioning portion for positioning and fixing the to-be-attached object. The cover includes an adhesive positioning portion for positioning and fixing the adhesive. The cover is rotatable relative to the base between an opening position and a closing position where the adhesive in the adhesive positioning portion is pressed against the to-be-attached object in the to-be-attached object positioning portion.

公开(公告)号：US20170104102A1

公开(公告)日：2017-04-13

申请号：US14905512

申请日：2015-08-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaodi LIU ,  Gang WANG

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/49 ,  H01L27/12 ,  H01L21/385

CPC classification number: H01L29/7869 ,  H01L21/385 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78696

Abstract: Embodiments of the present invention disclose a thin film transistor and an array substrate, manufacturing methods thereof, and a display device, which relate to the field of display technology, and can improve drifting of a threshold voltage of a thin film transistor and enhance the stability and reliability of an array substrate. The thin film transistor comprises an active layer and a gate insulating layer, wherein the material of the active layer is a metal oxide semiconductor, and during forming the thin film transistor, the gate insulating layer conveys oxygen to the active layer so as to reduce an interface state density and a movable impurity concentration of a. contact interface between the active layer and the gate insulating layer.

公开(公告)号：US20160035753A1

公开(公告)日：2016-02-04

申请号：US14429165

申请日：2014-06-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaodi LIU ,  Gang WANG

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1214 ,  H01L27/1233 ,  H01L27/1259 ,  H01L27/127 ,  H01L29/786 ,  H01L29/78696

Abstract: The present invention provides a complementary thin film transistor and a manufacturing method thereof, an array substrate and a display apparatus, relates to the field of manufacturing technology of thin film transistor, and can solve the problem that active layer materials of first and second thin film transistors in a complementary thin film transistor of the prior art have influence with each other. The manufacturing method of the present invention comprises steps of: forming a pattern comprising an active layer of a first thin film transistor and a protective layer on a base by a patterning process, and the protective layer is at least located above the active layer of the thin film transistor; and forming a pattern of an active layer of a second thin film transistor on the base subjected to above step by a patterning process. The present invention may be applied to various circuits and systems.

Abstract translation: 本发明提供了一种互补薄膜晶体管及其制造方法，阵列基板和显示装置，涉及薄膜晶体管的制造技术领域，并且可以解决第一和第二薄膜的有源层材料的问题 现有技术的互补薄膜晶体管中的晶体管彼此具有影响。 本发明的制造方法包括以下步骤：通过图案化工艺在基底上形成包括第一薄膜晶体管的有源层和保护层的图案，并且保护层至少位于 薄膜晶体管; 以及通过图案化工艺在经过上述步骤的基底上形成第二薄膜晶体管的有源层的图案。 本发明可以应用于各种电路和系统。