摘要:
Interconnect structures and methods are disclosed. In one embodiment, an interconnect structure includes a via extendable through a workpiece from a first side of the workpiece to a second side of the workpiece. The via is partially filled with a conductive material and has sidewalls. The interconnect structure includes a contact coupled to the conductive material in the via proximate the first side of the workpiece. The conductive material in the via comprises a recessed region comprising a landing zone proximate the second side of the workpiece.
摘要:
Interconnect structures and methods are disclosed. In one embodiment, an interconnect structure includes a via extendable through a workpiece from a first side of the workpiece to a second side of the workpiece. The via is partially filled with a conductive material and has sidewalls. The interconnect structure includes a contact coupled to the conductive material in the via proximate the first side of the workpiece. The conductive material in the via comprises a recessed region comprising a landing zone proximate the second side of the workpiece.
摘要:
In a method for making a semiconductor component, an integrated circuit is provided with a chip pad on an active side. A conductive track is connected to the chip pad and a passivation layer covers the conductive track. Forming the conductive track includes structuring an uneven sidewall for form closure with the passivation layer.
摘要:
A measurement mark (3) for determining the relative positional accuracy of a progressive projection onto a wafer (5), the projection being performed with two masks (3, 4), comprising two structure elements (10, 20) formed on a respective one of the masks (1, 2). The structure elements (10, 20) overlap with regard to their position on the masks so that, during the projection of the second structure element (20), an electrically conductive structure (30) formed on the basis of the first structure element on the wafer (5) is overformed by removal of a portion (31). In an electrical line width measurement, the reduced width (CD, CD30a) of the structure (30) is measured and compared either with the original width (62) or with that width (CD30b) of a further partial element (30b) produced by the overforming.
摘要:
A batch of semiconductor wafers are exposed after an alignment in a wafer stepper or scanner and each of their alignment parameters are determined. Using, e.g., a linear formula with tool specific coefficients, the overlay accuracy can be calculated from these alignment parameters in advance with a high degree of accuracy as if a measurement with an overlay inspection tool had been performed. The exposure tool-offset can be adjusted on a wafer-to-wafer basis to correct for the derived overlay inaccuracy. Moreover, the alignment parameters for a specific wafer can be used to change the tool-offset for the same wafer prior to exposure. The required inspection tool capacity is advantageously reduced, the wafer rework decreases, and time is saved to perform the exposure step.
摘要:
After exposing a semiconductor wafer, quality parameters, for example, the critical dimension, the overlay accuracy, and alignment parameters, etc. are measured in successive inspections and are compared with tolerance range widths that are specified dynamically by calculating the range from measured values of one or more of the other quality parameters. For example, the tolerance range width for the overlay accuracy can be increased for smaller measured critical dimension values of the same structures without affecting the functionality of the integrated circuit. Using a forward mechanism, the tolerance ranges can also be adjusted with the quality parameter measurements from a first layer to the quality parameter tolerance range width of a second layer.
摘要:
A reflective photomask includes a substrate with a substrate layer of a low thermal expansion material. The substrate layer includes a main portion of a first structural configuration and an auxiliary portion of a second structural configuration of the low thermal expansion material. The auxiliary portion is formed in a frame section surrounding a pattern section of the substrate. A multilayer mirror is formed on a first surface of the substrate. A reflectivity of the multilayer mirror is at least 50% at an exposure wavelength below 15 nm. A frame trench extending through the multilayer mirror exposes the substrate in the frame section. The auxiliary portion may include scatter centers for out-of-band radiation.
摘要:
A reflective photomask includes a substrate with a substrate layer of a low thermal expansion material. The substrate layer includes a main portion of a first structural configuration and an auxiliary portion of a second structural configuration of the low thermal expansion material. The auxiliary portion is formed in a frame section surrounding a pattern section of the substrate. A multilayer mirror is formed on a first surface of the substrate. A reflectivity of the multilayer mirror is at least 50% at an exposure wavelength below 15 nm. A frame trench extending through the multilayer mirror exposes the substrate in the frame section. The auxiliary portion may include scatter centres for out-of-band radiation.
摘要:
A measurement mark (3) for determining the relative positional accuracy of a progressive projection onto a wafer (5), the projection being performed with two masks (3, 4), comprising two structure elements (10, 20) formed on a respective one of the masks (1, 2). The structure elements (10, 20) overlap with regard to their position on the masks so that, during the projection of the second structure element (20), an electrically conductive structure (30) formed on the basis of the first structure element on the wafer (5) is overformed by removal of a portion (31). In an electrical line width measurement, the reduced width (CD, CD30a) of the structure (30) is measured and compared either with the original width (62) or with that width (CD30b) of a further partial element (30b) produced by the overforming.
摘要:
While a first leading semiconductor wafer (11) already processed in a process appliance (1) and belonging to a batch is being measured in a microscope measuring instrument (2) in relation to values for the structure parameters 30, a second or further semiconductor wafer (12) belonging to the batch is processed in the process appliance (1). An event signal (100) reports, for example, an inspection carried out successfully of the first wafer, so that the following wafers (12) no longer need to be inspected. Using the measured results, the process parameters (31) of the process appliance (1) are automatically readjusted. Events such as maintenance work or parameter drifts in trend maps etc. are detected in control units (8 or 9) and, via the output of an event signal (102), for example in an event database (40), lead to the event-based selection of structure parameters (30′) to be measured and/or to the initiation of a leading wafer (11). Limiting-value violations (21) of at least one process parameter (31), detected by a control unit (8), are responded to by a warning signal (101) and likewise fed into the event database (40).