公开(公告)号：US07084072B2

公开(公告)日：2006-08-01

申请号：US10874983

申请日：2004-06-23

申请人： Cheol Hwan Park ,  Sang Ho Woo ,  Chang Rock Song ,  Dong Su Park ,  Tae Hyeok Lee

发明人： Cheol Hwan Park ,  Sang Ho Woo ,  Chang Rock Song ,  Dong Su Park ,  Tae Hyeok Lee

IPC分类号： H01L21/302

CPC分类号： H01L21/28141 ,  H01L21/3144 ,  H01L21/3185 ,  H01L27/1052 ,  H01L27/10873

摘要： Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming a gate in a cell region and a peripheral region of a substrate, depositing a buffer oxide layer on the gate and the substrate, annealing a resultant structure of the substrate, depositing a nitride spacer layer on the buffer oxide layer, depositing an oxide spacer layer on the nitride spacer layer, forming an oxide spacer at the peripheral region of the substrate, and removing the oxide spacer layer remaining in the cell region. The annealing step is additionally carried out after depositing the buffer oxide layer so as to improve the interfacial surface characteristic and film quality, so that oxide etchant is prevented from penetrating into the silicon substrate during the wet dip process. Unnecessary voids are prevented from being created in the silicon substrate.

摘要翻译： 公开了半导体器件的制造方法。 该方法包括以下步骤：在衬底的单元区域和外围区域中形成栅极，在栅极和衬底上沉积缓冲氧化物层，退火所得衬底的结构，在缓冲氧化物上沉积氮化物间隔层 在所述氮化物间隔层上沉积氧化物间隔层，在所述衬底的周围区域形成氧化物间隔物，以及去除所述电池区域中剩余的氧化物间隔层。 在沉积缓冲氧化物层之后另外进行退火步骤，以改善界面表面特性和膜质量，从而防止在湿法浸渍过程中氧化物蚀刻剂渗入硅衬底。 防止在硅衬底中产生不必要的空隙。

公开(公告)号：US06913963B2

公开(公告)日：2005-07-05

申请号：US10331422

申请日：2002-12-30

申请人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Sang Ho Woo

发明人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Sang Ho Woo

IPC分类号： C23C16/42 ,  H01L21/02 ,  H01L21/28 ,  H01L21/31 ,  H01L21/314 ,  H01L21/318 ,  H01L21/82 ,  H01L21/8234 ,  H01L21/8242 ,  H01L21/8244 ,  H01L27/04 ,  H01L27/108

CPC分类号： H01L28/40 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/3185

摘要： A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.

摘要翻译： 公开了一种制造用于半导体器件的电容器的方法，其包括以下步骤：在半导体晶片上形成存储节点电极，在存储节点电极的表面上形成由环状氮化硅层制成的电介质层，以及 在所述电介质层上形成上电极; 降低电介质层的厚度T eff，并且通过使用环状Si 3 N 4 N或环状SiO

公开(公告)号：US07153739B2

公开(公告)日：2006-12-26

申请号：US10721092

申请日：2003-11-26

申请人： Chang Rock Song ,  Sang Ho Woo ,  Dong Su Park ,  Cheol Hwan Park ,  Tae Hyeok Lee

发明人： Chang Rock Song ,  Sang Ho Woo ,  Dong Su Park ,  Cheol Hwan Park ,  Tae Hyeok Lee

IPC分类号： H01L21/8242

CPC分类号： H01L28/40 ,  H01L21/3144

摘要： The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.

摘要翻译： 本发明公开了使用掺杂硅膜作为电极的半导体器件和氧化膜氮化物膜氧化膜作为电介质膜的电容器的制造方法。 在半导体基板上形成层间绝缘膜。 存储电极由层间绝缘膜上的掺杂多晶硅构成。 在包含n型杂质的气氛中进行热处理的存储电极上形成第一氧化物膜，以将杂质注入到第一氧化物膜中。 在第一氧化膜上形成氮化物膜，由此第一氧化膜中的杂质扩散到氮化物膜中。 在氮化膜上形成第二氧化膜。 然后在第二氧化膜上形成平板电极。

公开(公告)号：US06962856B2

公开(公告)日：2005-11-08

申请号：US10600332

申请日：2003-06-23

申请人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

发明人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

IPC分类号： H01L21/76 ,  H01L21/762

CPC分类号： H01L21/76232

摘要： A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed. The method comprises the steps of: (a) sequentially forming a pad oxide film and a pad nitride film on a semiconductor substrate; (b) selectively etching the pad nitride film to form a nitride film pattern; (c) etching the pad oxide film and a predetermined thickness of the semiconductor substrate using the nitride film pattern as a hard mask to form a trench; (d) forming a thermal oxide film on the surface of the trench; (e) performing an annealing process under NH3 atmosphere to form an oxide nitride film on the surface of the thermal oxide film; (f) forming a liner nitride film on the entire surface; (g) forming an oxide film filling the trench on the entire surface; and (h) performing a planarization process.

摘要翻译： 一种用于形成半导体器件的器件隔离膜的方法，其中在沉积衬垫氮化物膜之前和在氧化物膜沉积到沟槽的侧壁上之后，使用NH 3对氧化物膜进行退火处理， 公开了氧化膜的氮化。 该方法包括以下步骤：（a）在半导体衬底上依次形成衬垫氧化膜和衬垫氮化物膜; （b）选择性地蚀刻衬垫氮化物膜以形成氮化物膜图案; （c）使用氮化物膜图案作为硬掩模来蚀刻焊盘氧化膜和预定厚度的半导体衬底以形成沟槽; （d）在沟槽的表面上形成热氧化膜; （e）在NH 3气氛下进行退火处理以在所述热氧化膜的表面上形成氧化物氮化物膜; （f）在整个表面上形成衬里氮化物膜; （g）在整个表面上形成填充沟槽的氧化膜; 和（h）进行平面化处理。

公开(公告)号：US06825518B2

公开(公告)日：2004-11-30

申请号：US10331532

申请日：2002-12-30

申请人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

发明人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

IPC分类号： H01L2972

CPC分类号： H01L21/28202 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/3143

摘要： A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer. According to the method, after the deposition of the silicon nitride layer on the dielectric layer, oxidation treatment of the resultant structure is performed and the dielectric layer is formed on the oxidized silicon nitride layer, thereby improving the interface characteristics between the lower electrode and the dielectric layer and resulting in a decrease of the leakage current and an increase of the breakdown voltage of the capacitor in the semiconductor device.

公开(公告)号：US20140190410A1

公开(公告)日：2014-07-10

申请号：US14235896

申请日：2012-07-31

申请人： Young Dae Kim ,  Jun Jin Hyon ,  Sang Ho Woo ,  Seung Woo Shin ,  Hai Won Kim

发明人： Young Dae Kim ,  Jun Jin Hyon ,  Sang Ho Woo ,  Seung Woo Shin ,  Hai Won Kim

IPC分类号： C30B25/10

CPC分类号： C30B25/10 ,  C30B25/08 ,  C30B29/06 ,  C30B35/00 ,  H01L21/02046 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67757

摘要： Provided is an equipment for manufacturing a semiconductor. The equipment for manufacturing a semiconductor includes a cleaning chamber in which a cleaning process is performed on substrates, an epitaxial chamber in which an epitaxial process for forming an epitaxial layer on each of the substrates is performed, and a transfer chamber to which the cleaning chamber and the epitaxial chamber are connected to sides surfaces thereof, the transfer chamber including a substrate handler for transferring the substrates, on which the cleaning process is completed, into the epitaxial chamber.

摘要翻译： 提供了一种用于制造半导体的设备。 用于制造半导体的设备包括其中对基板进行清洁处理的清洁室，其中执行在每个基板上形成外延层的外延工艺的外延室，以及清洁室 并且外延室连接到其侧表面，转移室包括用于将完成清洁处理的基板转移到外延室中的基板处理器。

公开(公告)号：US20130178066A1

公开(公告)日：2013-07-11

申请号：US13823131

申请日：2011-10-06

申请人： Sung Kil Cho ,  Hai Won Kim ,  Sang Ho Woo ,  Seung Woo Shin ,  Gil Sun Jang ,  Wan Suk Oh

发明人： Sung Kil Cho ,  Hai Won Kim ,  Sang Ho Woo ,  Seung Woo Shin ,  Gil Sun Jang ,  Wan Suk Oh

IPC分类号： H01L21/306

CPC分类号： H01L21/306 ,  C23C16/4585 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/30604 ,  H01L21/31111 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.

摘要翻译： 提供一种制造具有三维结构的存储器件的方法，其包括在衬底上交替堆叠一个或多个电介质层和一个或多个牺牲层，形成通过电介质层和牺牲层的通孔，形成 填充通孔的图案，形成穿过电介质层和牺牲层的开口，以及通过开口提供蚀刻剂以除去牺牲层。 电介质层的堆叠包括向衬底供给选自由SiH 4，Si 2 H 6，Si 3 H 8和Si 4 H 10组成的组中的一种或多种气体，以沉积氧化硅层。 牺牲层的堆叠包括向基板供应一种或多种选自SiH 4，Si 2 H 6，Si 3 H 8，Si 4 H 10和二氯硅烷（SiCl 2 H 2）的气体和氨基气体，以沉积氮化硅层。

公开(公告)号：US20120040520A1

公开(公告)日：2012-02-16

申请号：US13266423

申请日：2010-04-12

申请人： Hai Won Kim ,  Sang Ho Woo ,  Sung Gil Cho

发明人： Hai Won Kim ,  Sang Ho Woo ,  Sung Gil Cho

IPC分类号： H01L21/20

CPC分类号： H01L21/02532 ,  H01L21/02579 ,  H01L21/02595 ,  H01L21/0262

摘要： Provided is a method of depositing an ultra-fine grain polysilicon thin film. The method includes forming a nitrogen atmosphere in a chamber loaded with a substrate, and supplying a source gas into the chamber to deposit a polysilicon thin film on the substrate, in which the source gas includes a silicon-based gas, a nitrogen-based gas, and a phosphorous-based gas. The forming of the nitrogen atmosphere may include supplying a nitrogen-based gas into the chamber.

摘要翻译： 提供了沉积超细晶粒多晶硅薄膜的方法。 该方法包括在装载有基板的室中形成氮气氛，并将源气体供应到室中以在基板上沉积多晶硅薄膜，其中源气体包括硅基气体，氮气体 ，和基于磷的气体。 氮气氛的形成可以包括将氮基气体供应到室中。

公开(公告)号：US09396954B2

公开(公告)日：2016-07-19

申请号：US13823131

申请日：2011-10-06

申请人： Sung Kil Cho ,  Hai Won Kim ,  Sang Ho Woo ,  Seung Woo Shin ,  Gil Sun Jang ,  Wan Suk Oh

发明人： Sung Kil Cho ,  Hai Won Kim ,  Sang Ho Woo ,  Seung Woo Shin ,  Gil Sun Jang ,  Wan Suk Oh

IPC分类号： H01L21/306 ,  C23C16/458 ,  H01L21/02 ,  H01L21/311 ,  H01L27/115 ,  H01L29/66 ,  H01L29/792

CPC分类号： H01L21/306 ,  C23C16/4585 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/30604 ,  H01L21/31111 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.

摘要翻译： 提供一种制造具有三维结构的存储器件的方法，其包括在衬底上交替堆叠一个或多个电介质层和一个或多个牺牲层，形成通过电介质层和牺牲层的通孔，形成 填充通孔的图案，形成穿过电介质层和牺牲层的开口，以及通过开口提供蚀刻剂以除去牺牲层。 电介质层的堆叠包括向衬底供给选自由SiH 4，Si 2 H 6，Si 3 H 8和Si 4 H 10组成的组中的一种或多种气体，以沉积氧化硅层。 牺牲层的堆叠包括向基板供应一种或多种选自SiH 4，Si 2 H 6，Si 3 H 8，Si 4 H 10和二氯硅烷（SiCl 2 H 2）的气体和氨基气体，以沉积氮化硅层。

公开(公告)号：US20140174357A1

公开(公告)日：2014-06-26

申请号：US14235313

申请日：2012-07-31

申请人： Young Dae Kim ,  Jun Jin Hyon ,  Sang Ho Woo ,  Seung Woo Shin ,  Hai Won Kim

发明人： Young Dae Kim ,  Jun Jin Hyon ,  Sang Ho Woo ,  Seung Woo Shin ,  Hai Won Kim

IPC分类号： C30B25/02

CPC分类号： C30B25/02 ,  C23C16/0236 ,  C23C16/54 ,  C30B25/08 ,  C30B35/005 ,  H01L21/02046 ,  H01L21/67051 ,  H01L21/67178 ,  H01L21/67757

摘要： Provided is an equipment for manufacturing a semiconductor. The equipment for manufacturing a semiconductor includes a cleaning chamber in which a cleaning process is performed on substrates, an epitaxial chamber in which an epitaxial process for forming an epitaxial layer on each of the substrates is performed, and a transfer chamber to which the cleaning chamber and the epitaxial chamber are connected to sides surfaces thereof, the transfer chamber including a substrate handler for transferring the substrates, on which the cleaning process is completed, into the epitaxial chamber. The cleaning chamber is performed in a batch type with respect to the plurality of substrates.

摘要翻译： 提供了一种用于制造半导体的设备。 用于制造半导体的设备包括其中对基板进行清洁处理的清洁室，其中执行在每个基板上形成外延层的外延工艺的外延室，以及清洁室 并且外延室连接到其侧表面，转移室包括用于将完成清洁处理的基板转移到外延室中的基板处理器。 清洁室相对于多个基板以批式进行。