公开(公告)号：US07084072B2

公开(公告)日：2006-08-01

申请号：US10874983

申请日：2004-06-23

申请人： Cheol Hwan Park ,  Sang Ho Woo ,  Chang Rock Song ,  Dong Su Park ,  Tae Hyeok Lee

发明人： Cheol Hwan Park ,  Sang Ho Woo ,  Chang Rock Song ,  Dong Su Park ,  Tae Hyeok Lee

IPC分类号： H01L21/302

CPC分类号： H01L21/28141 ,  H01L21/3144 ,  H01L21/3185 ,  H01L27/1052 ,  H01L27/10873

摘要： Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming a gate in a cell region and a peripheral region of a substrate, depositing a buffer oxide layer on the gate and the substrate, annealing a resultant structure of the substrate, depositing a nitride spacer layer on the buffer oxide layer, depositing an oxide spacer layer on the nitride spacer layer, forming an oxide spacer at the peripheral region of the substrate, and removing the oxide spacer layer remaining in the cell region. The annealing step is additionally carried out after depositing the buffer oxide layer so as to improve the interfacial surface characteristic and film quality, so that oxide etchant is prevented from penetrating into the silicon substrate during the wet dip process. Unnecessary voids are prevented from being created in the silicon substrate.

摘要翻译： 公开了半导体器件的制造方法。 该方法包括以下步骤：在衬底的单元区域和外围区域中形成栅极，在栅极和衬底上沉积缓冲氧化物层，退火所得衬底的结构，在缓冲氧化物上沉积氮化物间隔层 在所述氮化物间隔层上沉积氧化物间隔层，在所述衬底的周围区域形成氧化物间隔物，以及去除所述电池区域中剩余的氧化物间隔层。 在沉积缓冲氧化物层之后另外进行退火步骤，以改善界面表面特性和膜质量，从而防止在湿法浸渍过程中氧化物蚀刻剂渗入硅衬底。 防止在硅衬底中产生不必要的空隙。

公开(公告)号：US07153739B2

公开(公告)日：2006-12-26

申请号：US10721092

申请日：2003-11-26

申请人： Chang Rock Song ,  Sang Ho Woo ,  Dong Su Park ,  Cheol Hwan Park ,  Tae Hyeok Lee

发明人： Chang Rock Song ,  Sang Ho Woo ,  Dong Su Park ,  Cheol Hwan Park ,  Tae Hyeok Lee

IPC分类号： H01L21/8242

CPC分类号： H01L28/40 ,  H01L21/3144

摘要： The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.

摘要翻译： 本发明公开了使用掺杂硅膜作为电极的半导体器件和氧化膜氮化物膜氧化膜作为电介质膜的电容器的制造方法。 在半导体基板上形成层间绝缘膜。 存储电极由层间绝缘膜上的掺杂多晶硅构成。 在包含n型杂质的气氛中进行热处理的存储电极上形成第一氧化物膜，以将杂质注入到第一氧化物膜中。 在第一氧化膜上形成氮化物膜，由此第一氧化膜中的杂质扩散到氮化物膜中。 在氮化膜上形成第二氧化膜。 然后在第二氧化膜上形成平板电极。

公开(公告)号：US06964930B2

公开(公告)日：2005-11-15

申请号：US10739620

申请日：2003-12-18

申请人： Dong Su Park ,  Tae Hyeok Lee ,  Chang Rock Song ,  Cheol Hwan Park

发明人： Dong Su Park ,  Tae Hyeok Lee ,  Chang Rock Song ,  Cheol Hwan Park

IPC分类号： H01L21/318 ,  C23C16/02 ,  C23C16/34 ,  C23C16/56 ,  H01L21/20 ,  H01L21/306 ,  H01L21/314 ,  H01L29/51 ,  H01L29/78 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/02247 ,  C23C16/0227 ,  C23C16/345 ,  C23C16/56 ,  H01L21/02052 ,  H01L21/022 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/3144 ,  H01L21/3145 ,  H01L29/513 ,  H01L29/518 ,  Y10S438/954

摘要： In fabricating a dielectric layer, a semiconductor substrate which has been washed is provided. A first nitride film is formed by loading the substrate in a first furnace and subjecting the substrate to a first nitride treatment. A first oxide film is formed by unloading the substrate having the first nitride film out of the first furnace and subjecting the substrate to a first nitride treatment by introducing air while the substrate is unloaded. A second nitride film is formed by loading the substrate having the first oxide film in a second furnace and subjecting the substrate to a second nitride treatment. A second oxide film is formed by subjecting the top surface of the second nitride film to a second oxide treatment.

摘要翻译： 在制造电介质层时，提供已洗涤的半导体衬底。 第一氮化物膜通过将基板装载在第一炉中并对基板进行第一氮化物处理而形成。 通过将具有第一氮化物膜的衬底从第一炉中卸出并通过在衬底卸载的同时引入空气对衬底进行第一氮化物处理来形成第一氧化物膜。 通过将具有第一氧化物膜的衬底装载在第二炉中并对衬底进行第二氮化物处理来形成第二氮化物膜。 通过对第二氮化物膜的顶表面进行第二氧化物处理来形成第二氧化物膜。

公开(公告)号：US06825518B2

公开(公告)日：2004-11-30

申请号：US10331532

申请日：2002-12-30

申请人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

发明人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

IPC分类号： H01L2972

CPC分类号： H01L21/28202 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/3143

摘要： A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer. According to the method, after the deposition of the silicon nitride layer on the dielectric layer, oxidation treatment of the resultant structure is performed and the dielectric layer is formed on the oxidized silicon nitride layer, thereby improving the interface characteristics between the lower electrode and the dielectric layer and resulting in a decrease of the leakage current and an increase of the breakdown voltage of the capacitor in the semiconductor device.

公开(公告)号：US06962856B2

公开(公告)日：2005-11-08

申请号：US10600332

申请日：2003-06-23

申请人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

发明人： Cheol Hwan Park ,  Dong Su Park ,  Tae Hyeok Lee ,  Sang Ho Woo

IPC分类号： H01L21/76 ,  H01L21/762

CPC分类号： H01L21/76232

摘要： A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed. The method comprises the steps of: (a) sequentially forming a pad oxide film and a pad nitride film on a semiconductor substrate; (b) selectively etching the pad nitride film to form a nitride film pattern; (c) etching the pad oxide film and a predetermined thickness of the semiconductor substrate using the nitride film pattern as a hard mask to form a trench; (d) forming a thermal oxide film on the surface of the trench; (e) performing an annealing process under NH3 atmosphere to form an oxide nitride film on the surface of the thermal oxide film; (f) forming a liner nitride film on the entire surface; (g) forming an oxide film filling the trench on the entire surface; and (h) performing a planarization process.

摘要翻译： 一种用于形成半导体器件的器件隔离膜的方法，其中在沉积衬垫氮化物膜之前和在氧化物膜沉积到沟槽的侧壁上之后，使用NH 3对氧化物膜进行退火处理， 公开了氧化膜的氮化。 该方法包括以下步骤：（a）在半导体衬底上依次形成衬垫氧化膜和衬垫氮化物膜; （b）选择性地蚀刻衬垫氮化物膜以形成氮化物膜图案; （c）使用氮化物膜图案作为硬掩模来蚀刻焊盘氧化膜和预定厚度的半导体衬底以形成沟槽; （d）在沟槽的表面上形成热氧化膜; （e）在NH 3气氛下进行退火处理以在所述热氧化膜的表面上形成氧化物氮化物膜; （f）在整个表面上形成衬里氮化物膜; （g）在整个表面上形成填充沟槽的氧化膜; 和（h）进行平面化处理。

公开(公告)号：US06913963B2

公开(公告)日：2005-07-05

申请号：US10331422

申请日：2002-12-30

申请人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Sang Ho Woo

发明人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Sang Ho Woo

IPC分类号： C23C16/42 ,  H01L21/02 ,  H01L21/28 ,  H01L21/31 ,  H01L21/314 ,  H01L21/318 ,  H01L21/82 ,  H01L21/8234 ,  H01L21/8242 ,  H01L21/8244 ,  H01L27/04 ,  H01L27/108

CPC分类号： H01L28/40 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/3185

摘要： A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.

摘要翻译： 公开了一种制造用于半导体器件的电容器的方法，其包括以下步骤：在半导体晶片上形成存储节点电极，在存储节点电极的表面上形成由环状氮化硅层制成的电介质层，以及 在所述电介质层上形成上电极; 降低电介质层的厚度T eff，并且通过使用环状Si 3 N 4 N或环状SiO

公开(公告)号：US06884678B2

公开(公告)日：2005-04-26

申请号：US10608429

申请日：2003-06-30

申请人： Dong Su Park ,  Tae Hyeok Lee ,  Cheol Hwan Park

发明人： Dong Su Park ,  Tae Hyeok Lee ,  Cheol Hwan Park

IPC分类号： H01L21/8242 ,  H01L21/02 ,  H01L21/314 ,  H01L21/318

CPC分类号： H01L21/3185 ,  H01L21/0217 ,  H01L21/02183 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02274 ,  H01L27/10852 ,  H01L28/91

摘要： A method for forming of a capacitor wherein an etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film is disclosed. The method comprises the steps of: forming an etching barrier layer on an interlayer insulating film having a storage electrode contact plug therein, the etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film; forming an oxide film on the etching barrier layer; selectively etching the oxide film and the etching barrier layer to form an opening exposing the storage electrode contact plug; depositing a storage electrode layer on the bottom and the inner walls of the opening; and removing the oxide film, whereby forming a storage electrode.

摘要翻译： 一种形成电容器的方法，其中公开了包括氮化物膜和钽氧化物膜的叠层结构的蚀刻阻挡层。 该方法包括以下步骤：在其上具有存储电极接触插塞的层间绝缘膜上形成蚀刻阻挡层，所述蚀刻阻挡层包括氮化物膜和氧化钽膜的堆叠结构; 在蚀刻阻挡层上形成氧化膜; 选择性地蚀刻氧化膜和蚀刻阻挡层以形成暴露存储电极接触插塞的开口; 在开口的底部和内壁上沉积存储电极层; 除去氧化膜，由此形成存储电极。

公开(公告)号：US06955974B2

公开(公告)日：2005-10-18

申请号：US10877714

申请日：2004-06-25

申请人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Ho Jin Cho ,  Eun A Lee

发明人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Ho Jin Cho ,  Eun A Lee

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/8242

CPC分类号： H01L21/76224 ,  H01L27/10894

摘要： A method for forming an isolation layer of a semiconductor device, which comprises the steps of: a) sequentially forming a pad oxide layer and a pad nitride layer on a silicon substrate; b) etching the pad nitride layer, the pad oxide layer, and the silicon substrate, thereby forming a trench; c) thermal-oxidizing the resultant substrate to form a sidewall oxide layer on a surface of the trench; d) nitrifying the sidewall oxide layer through the use of NH3 annealing; e) depositing a liner aluminum nitride layer on an entire surface of the silicon substrate inclusive of the nitrated sidewall oxide layer; f) depositing a buried oxide layer on the liner aluminum nitride layer to fill the trench; g) performing a chemical mechanical polishing process with respect to the buried oxide layer; and h) eliminating the pad nitride layer.

摘要翻译： 一种用于形成半导体器件的隔离层的方法，包括以下步骤：a）在硅衬底上依次形成焊盘氧化物层和衬垫氮化物层; b）蚀刻衬垫氮化物层，衬垫氧化物层和硅衬底，从而形成沟槽; c）热氧化所得衬底以在沟槽的表面上形成侧壁氧化物层; d）通过使用NH 3退火对侧壁氧化物层进行硝化; e）在包括所述硝化侧壁氧化物层的所述硅衬底的整个表面上沉积衬里氮化铝层; f）在衬里氮化铝层上沉积掩埋氧化物层以填充沟槽; g）对所述掩埋氧化物层进行化学机械抛光工艺; 以及h）消除所述衬垫氮化物层。

公开(公告)号：US20080081430A1

公开(公告)日：2008-04-03

申请号：US11758507

申请日：2007-06-05

申请人： Cheol Hwan Park ,  Dong-Su Park ,  Eun A. Lee ,  Hye Jin Seo

发明人： Cheol Hwan Park ,  Dong-Su Park ,  Eun A. Lee ,  Hye Jin Seo

IPC分类号： H01L21/24

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： A method for forming a capacitor in a semiconductor device is disclosed. The method includes forming a storage node electrode on a semiconductor substrate, forming a dielectric layer having a high dielectric constant on the storage node electrode, depositing a plate electrode on the dielectric layer, thereby forming by-product impurities, and removing by-product impurities remaining on the plate electrode by introducing a hydrogen (H) atom-containing gas onto the semiconductor substrate while depositing a capping layer on the plate electrode.

摘要翻译： 公开了一种在半导体器件中形成电容器的方法。 该方法包括在半导体衬底上形成存储节点电极，在存储节点电极上形成具有高介电常数的电介质层，在电介质层上沉积平板电极，从而形成副产物杂质，除去副产物杂质 通过在半导体衬底上引入含氢（H）原子的气体，同时在平板电极上沉积覆盖层而残留在平板电极上。

公开(公告)号：US20080003751A1

公开(公告)日：2008-01-03

申请号：US11646730

申请日：2006-12-28

申请人： Cheol Hwan Park ,  Dong Su Park ,  Eun A. Lee ,  Hye Jin Seo

发明人： Cheol Hwan Park ,  Dong Su Park ,  Eun A. Lee ,  Hye Jin Seo

IPC分类号： H01L21/336

CPC分类号： H01L21/82345 ,  H01L21/28044 ,  H01L21/324 ,  H01L21/823842

摘要： A method for forming a dual poly gate of a semiconductor device includes forming a gate insulating layer on a semiconductor substrate having a first region and a second region; forming an amorphous silicon layer, in which a portion defined by the first region is implanted with impurity ions of a first conductivity type and a portion defined by the second region is implanted with impurity ions of a second conductivity type, on the gate insulating layer; forming silicon seeds on the amorphous silicon layer; forming hemispherical grains on the surface of the amorphous silicon layer using the silicon seeds; and activating the implanted impurity ions and crystallizing the amorphous silicon layer having the hemispherical grains formed thereon by annealing to form a polysilicon layer of a first conductivity type and a polysilicon layer of a second conductivity type in the portions of the amorphous silicon layer defined by the first and second regions, respectively.

摘要翻译： 一种用于形成半导体器件的双多晶硅栅极的方法包括在具有第一区域和第二区域的半导体衬底上形成栅极绝缘层; 形成非晶硅层，其中由栅极绝缘层注入由第一导电类型的杂质离子和由第二区限定的部分，由第一区限定的部分注入第二导电类型的杂质离子; 在所述非晶硅层上形成硅晶种; 使用硅晶粒在非晶硅层的表面上形成半球状晶粒; 并激活注入的杂质离子并使其上形成有半球形晶粒的非晶硅层通过退火结晶，以在由非晶硅层限定的部分中形成第一导电类型的多晶硅层和第二导电类型的多晶硅层 第一和第二区域。