公开(公告)号：US20100097596A1

公开(公告)日：2010-04-22

申请号：US12356849

申请日：2009-01-21

Applicant: Chiang-Lin Shih ,  Chun-Yen Huang

Inventor： Chiang-Lin Shih ,  Chun-Yen Huang

IPC: G03B27/32

CPC classification number: G03F7/70358

Abstract: A scanning exposure method is provided. A mask and a substrate are oppositely moved along a direction. The mask and the substrate are moved in at least two different uniform relative velocities during a one shot exposure, thus producing an exposed shot area of an expected size on the substrate.

Abstract translation: 提供扫描曝光方法。 掩模和基板沿着一个方向相反地移动。 在单次曝光期间，掩模和基底以至少两个不同的均匀相对速度移动，从而在基底上产生预期尺寸的曝光的照射区域。

公开(公告)号：US07915133B2

公开(公告)日：2011-03-29

申请号：US11953481

申请日：2007-12-10

Applicant: Kuo-Yao Cho ,  Wen-Bin Wu ,  Chiang-Lin Shih ,  Jen-Jui Huang

Inventor： Kuo-Yao Cho ,  Wen-Bin Wu ,  Chiang-Lin Shih ,  Jen-Jui Huang

IPC: H01L21/20

CPC classification number: H01L29/945 ,  H01L29/66181

Abstract: A method of forming a ring-type capacitor is provided. The method includes providing a substrate; forming a patterned mask layer on the substrate, the patterned mask layer defining a ring pattern; removing the substrate by using the patterned mask layer as a mask to form a ring-type trench in the substrate; the ring-type trench including an inner wall and an outer wall; and forming a capacitor structure on the inner wall and the outer wall of the ring-type trench.

Abstract translation: 提供一种形成环型电容器的方法。 该方法包括提供基板; 在所述衬底上形成图案化掩模层，所述图案化掩模层限定环形图案; 通过使用图案化掩模层作为掩模去除衬底，以在衬底中形成环型沟槽; 所述环形沟槽包括内壁和外壁; 并在环形沟槽的内壁和外壁上形成电容器结构。

公开(公告)号：US20060234440A1

公开(公告)日：2006-10-19

申请号：US11160683

申请日：2005-07-05

Applicant: Yuan-Hsun WU ,  An-Hsiung Liu ,  Chiang-Lin Shih ,  Pei-Ing Lee ,  Hui-Min Mao ,  Lin-Chin Su

Inventor： Yuan-Hsun WU ,  An-Hsiung Liu ,  Chiang-Lin Shih ,  Pei-Ing Lee ,  Hui-Min Mao ,  Lin-Chin Su

IPC: H01L21/8242 ,  H01L21/20

CPC classification number: G03F9/7084 ,  G03F7/70633 ,  G03F9/708 ,  H01L23/544 ,  H01L27/1087 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A small-size (w

Abstract translation: 提出了与“k1工艺”结合的小尺寸（w <0.5微米）对准标记，其特别适用于需要高精度AA-DT对准的沟槽电容器DRAM器件的制造。 利用“k1工艺”来蚀刻散布在对准标记沟槽中的多晶硅，并且在AA图案转印之前刷新沟槽轮廓，从而提高晶片对准精度和精度。

公开(公告)号：US08658051B2

公开(公告)日：2014-02-25

申请号：US12119275

申请日：2008-05-12

Applicant: Kuo-Yao Cho ,  Wen-Bin Wu ,  Ya-Chih Wang ,  Chiang-Lin Shih ,  Chao-Wen Lay ,  Chih-Huang Wu

Inventor： Kuo-Yao Cho ,  Wen-Bin Wu ,  Ya-Chih Wang ,  Chiang-Lin Shih ,  Chao-Wen Lay ,  Chih-Huang Wu

IPC: C23F1/00 ,  B44C1/22 ,  H01L21/306

CPC classification number: H01L21/32139 ,  H01L21/0337 ,  H01L21/0338

Abstract: A method of improving lithography resolution on a semiconductor, including the steps of providing a substrate on which a protecting layer, a first etching layer and a photoresist layer are sequentially formed; patterning the photoresist layer to form an opening so as to partially reveal the first etching layer; implanting a first ion into the revealed first etching layer to form a first doped area; and implanting a second ion into the revealed first etching layer to form a second doped area, wherein the first doped area is independent from the second doped area is provided.

Abstract translation: 一种改善半导体上的光刻分辨率的方法，包括提供其上依次形成保护层，第一蚀刻层和光致抗蚀剂层的基板的步骤; 图案化光致抗蚀剂层以形成开口，以便部分地露出第一蚀刻层; 将第一离子注入到所揭示的第一蚀刻层中以形成第一掺杂区域; 以及将第二离子注入到所揭示的第一蚀刻层中以形成第二掺杂区域，其中所述第一掺杂区域与所述第二掺杂区域无关。

公开(公告)号：US20120140193A1

公开(公告)日：2012-06-07

申请号：US12960319

申请日：2010-12-03

Applicant: Chui-Fu Chiu ,  Chiang-Lin Shih

Inventor： Chui-Fu Chiu ,  Chiang-Lin Shih

IPC: G03B27/42

CPC classification number: H01L23/544 ,  G03F9/7003 ,  G03F9/7088 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A dynamic wafer alignment method and an exposure scanner system are provided. The exposure scanner system having a scan path, includes an exposure apparatus, an optical sensor apparatus and a wafer stage. The method comprises the steps of: (a) providing a wafer, having a plurality of shot areas, wherein each shot area has a plurality of alignment marks thereon; (b) forming a photo-resist layer on the wafer; (c) detecting the alignment marks at a portion of a shot area along the scan path by the optical sensor apparatus to obtain compensation data for wafer alignment of the portion of the shot area; (d) performing real time feedback of the compensation data for wafer alignment to the wafer stage; (e) exposing the photo-resist layer at the portion of the shot area along the scan path; (f) continuously repeating the steps (c) to (e) at the shot area along the scan path until all of the photo-resist layer at the shot area are exposed; and (g) repeating the step (f) until the photo-resist layer of all of the shot areas on the wafer are exposed.

Abstract translation: 提供动态晶片对准方法和曝光扫描器系统。 具有扫描路径的曝光扫描器系统包括曝光装置，光学传感器装置和晶片台。 该方法包括以下步骤：（a）提供具有多个拍摄区域的晶片，其中每个拍摄区域上具有多个对准标记; （b）在晶片上形成光刻胶层; （c）通过光学传感器装置检测沿着扫描路径的拍摄区域的一部分处的对准标记，以获得用于拍摄区域的该部分的晶片对准的补偿数据; （d）对晶片台进行晶片对准的补偿数据的实时反馈; （e）沿着扫描路径在照射区域的部分处暴露光致抗蚀剂层; （f）沿扫描路径连续地重复步骤（c）至（e），直到所有的光刻胶层都被曝光; 和（g）重复步骤（f），直到晶片上的所有照射区域的光致抗蚀剂层露出。

公开(公告)号：US20090290134A1

公开(公告)日：2009-11-26

申请号：US12188218

申请日：2008-08-08

Applicant: Chiang-Lin Shih ,  Kuo-Yao Cho

Inventor： Chiang-Lin Shih ,  Kuo-Yao Cho

IPC: G03B27/52

CPC classification number: G03B27/52

Abstract: A method for exposure is provided to avoid a rise in temperature of a lens set. First, a light beam passes through a first light-receiving region of the lens set to expose a pattern on a substrate, and the first light-receiving region has a rise in temperature. Thereafter, the first light-receiving region is moved away. Afterwards, the light beam passes through a second light-receiving region of the lens set so that the first light-receiving region has a drop in temperature.

Abstract translation: 提供一种用于曝光的方法以避免透镜组的温度升高。 首先，光束穿过透镜组的第一光接收区域以暴露衬底上的图案，并且第一光接收区域具有升高的温度。 此后，第一光接收区域移开。 之后，光束通过透镜组的第二光接收区域，使得第一光接收区域的温度下降。

公开(公告)号：US20090111060A1

公开(公告)日：2009-04-30

申请号：US12125074

申请日：2008-05-22

Applicant: Chiang-Lin Shih ,  Feng-Yi Chen ,  Kuo-Yao Cho

Inventor： Chiang-Lin Shih ,  Feng-Yi Chen ,  Kuo-Yao Cho

IPC: G03F7/20

CPC classification number: G03F7/7085 ,  F15B2211/20515 ,  G03F7/70516 ,  G03F9/7003 ,  G03F9/7011 ,  G03F9/7019 ,  G03F9/7046 ,  G03F9/7088

Abstract: An exposure method suitable for a photolithography process is described. First, a wafer with a group of alignment marks formed thereon is provided. A first alignment step is conducted by using the group of the alignment marks on the wafer to obtain a first calibration data. Next, a second alignment step is conducted by using a portion of the group of alignment marks on the wafer to obtain a second calibration data. The first calibration data is then compared with the second calibration data to obtain a comparison result. Next, a photoresist exposure step is conducted on the wafer according to the comparison result.

Abstract translation: 描述适用于光刻工艺的曝光方法。 首先，提供在其上形成有一组对准标记的晶片。 通过使用晶片上的对准标记组来进行第一对准步骤以获得第一校准数据。 接下来，通过使用晶片上的一组对准标记的一部分来进行第二对准步骤，以获得第二校准数据。 然后将第一校准数据与第二校准数据进行比较以获得比较结果。 接下来，根据比较结果在晶片上进行光致抗蚀剂曝光步骤。

公开(公告)号：US20100009294A1

公开(公告)日：2010-01-14

申请号：US12253235

申请日：2008-10-16

Applicant: Chiang-Lin Shih ,  Kuo-Yao Cho

Inventor： Chiang-Lin Shih ,  Kuo-Yao Cho

IPC: G03F7/00

CPC classification number: G03F7/70466 ,  G03F7/70425 ,  G03F7/70558 ,  G03F7/70625

Abstract: An exposure method is disclosed. A wafer coated with a photoresist layer having an exposure threshold dose is provided. The wafer has at least a central region and a peripheral region. Then, a compensating light beam having a first dose directs on the photoresist layer within the peripheral region. Next, a patterned light beam having a second dose is then projected, in a step-and-scan manner, onto the photoresist layer, thereby exposing the photoresist layer. The total dose of the first energy and the second energy is above than the exposure threshold dose.

Abstract translation: 公开了曝光方法。 提供涂覆有具有暴露阈值剂量的光致抗蚀剂层的晶片。 晶片至少具有中心区域和周边区域。 然后，具有第一剂量的补偿光束指向周边区域内的光致抗蚀剂层。 接下来，将具有第二剂量的图案化光束以逐步扫描的方式投射到光致抗蚀剂层上，由此曝光光致抗蚀剂层。 第一能量和第二能量的总剂量高于暴露阈值剂量。

公开(公告)号：US20070190736A1

公开(公告)日：2007-08-16

申请号：US11616849

申请日：2006-12-27

Applicant: An-Hsiung Liu ,  Chiang-Lin Shih ,  Wen-Bin Wu ,  Hui-Min Mao ,  Lin-Chin Su ,  Pei-Ing Lee

Inventor： An-Hsiung Liu ,  Chiang-Lin Shih ,  Wen-Bin Wu ,  Hui-Min Mao ,  Lin-Chin Su ,  Pei-Ing Lee

IPC: H01L21/20

CPC classification number: H01L29/66181 ,  G03F7/70633 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L27/1087 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A small-size (w

Abstract translation: 提出了与“k1工艺”结合的小尺寸（w <0.5微米）对准标记，其特别适用于制造需要高精度AA-DT和GC-DT重叠对准的沟槽电容器DRAM器件。 利用“k1工艺”来蚀刻散布在对准标记沟槽中的多晶硅，并刷新沟槽轮廓，从而提高覆盖对准精度和精度。

公开(公告)号：US07892712B2

公开(公告)日：2011-02-22

申请号：US12125074

申请日：2008-05-22

Applicant: Chiang-Lin Shih ,  Feng-Yi Chen ,  Kuo-Yao Cho

Inventor： Chiang-Lin Shih ,  Feng-Yi Chen ,  Kuo-Yao Cho

IPC: G03F9/00 ,  G03C5/00

CPC classification number: G03F7/7085 ,  F15B2211/20515 ,  G03F7/70516 ,  G03F9/7003 ,  G03F9/7011 ,  G03F9/7019 ,  G03F9/7046 ,  G03F9/7088

Abstract: An exposure method suitable for a photolithography process is described. First, a wafer with a group of alignment marks formed thereon is provided. A first alignment step is conducted by using the group of the alignment marks on the wafer to obtain a first calibration data. Next, a second alignment step is conducted by using a portion of the group of alignment marks on the wafer to obtain a second calibration data. The first calibration data is then compared with the second calibration data to obtain a comparison result. Next, a photoresist exposure step is conducted on the wafer according to the comparison result.

Abstract translation: 描述适用于光刻工艺的曝光方法。 首先，提供在其上形成有一组对准标记的晶片。 通过使用晶片上的对准标记组来进行第一对准步骤以获得第一校准数据。 接下来，通过使用晶片上的一组对准标记的一部分来进行第二对准步骤，以获得第二校准数据。 然后将第一校准数据与第二校准数据进行比较以获得比较结果。 接下来，根据比较结果在晶片上进行光致抗蚀剂曝光步骤。