公开(公告)号：US10515252B2

公开(公告)日：2019-12-24

申请号：US15818779

申请日：2017-11-21

申请人： Chih-Yen Wu ,  Chen-Ta Ho ,  Chien-Hung Wu

发明人： Chih-Yen Wu ,  Chen-Ta Ho ,  Chien-Hung Wu

IPC分类号： G06K9/00 ,  G02B3/00 ,  B32B37/14 ,  G01J1/02 ,  G01J1/04 ,  G02B13/00 ,  G01J1/44

摘要： An optical element fabrication method including following steps are provided. First, a micro-lens layer including a micro-lens and a first substrate is provided. Besides, a micro optical channel layer including a micro optical channel and a second substrate is provided. A first bonding process is performed to bond the micro-lens layer to the micro optical channel layer, wherein the micro-lens is corresponded to the micro optical channel in a direction that is perpendicular to the surface of the second substrate, and the first substrate of the micro-lens layer is removed later.

公开(公告)号：US08530326B2

公开(公告)日：2013-09-10

申请号：US13538220

申请日：2012-06-29

申请人： Su-Chen Lai ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Hak-Lay Chuang ,  Chiung-Han Yeh ,  Hong-Dyi Chang ,  Kuo Cheng-Cheng ,  Chien-Hung Wu ,  Tzung-Chi Lee

发明人： Su-Chen Lai ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Hak-Lay Chuang ,  Chiung-Han Yeh ,  Hong-Dyi Chang ,  Kuo Cheng-Cheng ,  Chien-Hung Wu ,  Tzung-Chi Lee

IPC分类号： H01L21/76

CPC分类号： H01L21/823437 ,  H01L21/31053 ,  H01L21/3212 ,  H01L21/823828 ,  H01L27/08

摘要： A method of semiconductor device fabrication including forming a plurality of gate structures in a first portion of a substrate, wherein the plurality of gate structures have a first height. A first metal gate structure is formed in a second portion of the substrate, the first metal gate structure being surrounded by an isolation region. A plurality of dummy gate structures is formed in the second portion of the substrate. The plurality of dummy gate structures are configured in a ring formation encircling the metal gate structure and the isolation region. The plurality of dummy structures have a top surface that is substantially planar with the plurality of gate structures and covers at least 5% of a pattern density of the second portion of the substrate.

摘要翻译： 一种半导体器件制造方法，包括在衬底的第一部分中形成多个栅极结构，其中所述多个栅极结构具有第一高度。 第一金属栅极结构形成在衬底的第二部分中，第一金属栅极结构被隔离区包围。 在基板的第二部分中形成多个虚拟栅极结构。 多个虚拟栅极结构被构造成围绕金属栅极结构和隔离区域的环形结构。 多个虚拟结构具有与多个栅极结构基本平面的顶表面，并且覆盖基板的第二部分的图案密度的至少5％。

公开(公告)号：US08154092B2

公开(公告)日：2012-04-10

申请号：US10914468

申请日：2004-08-09

申请人： Jeffrey M. Melzak ,  Chien-Hung Wu

发明人： Jeffrey M. Melzak ,  Chien-Hung Wu

IPC分类号： H01L29/82

CPC分类号： B81C1/00246 ,  B81C2203/0728

摘要： MEMS structures that include silicon carbide micromechanical components, as well as methods of forming and using the same, are provided. The silicon carbide micromechanical components may be integrated on the same structure with electronic components that control or detect movement of the micromechanical components. MEMS structures of the invention may be used in a variety of applications including microsensor and microactuator applications.

摘要翻译： 提供了包括碳化硅微机械部件的MEMS结构以及其形成和使用方法。 碳化硅微机械部件可以集成在与控制或检测微机械部件的移动的电子部件相同的结构上。 本发明的MEMS结构可用于各种应用，包括微传感器和微致动器应用。

公开(公告)号：US20120070684A1

公开(公告)日：2012-03-22

申请号：US13046785

申请日：2011-03-14

申请人： Chin-Sheng Wang ,  Ching-Sheng Chen ,  Chien-Hung Wu

发明人： Chin-Sheng Wang ,  Ching-Sheng Chen ,  Chien-Hung Wu

IPC分类号： B32B15/04 ,  B32B38/00 ,  C25D5/16 ,  B32B37/00

CPC分类号： C25D5/16 ,  B32B15/08 ,  B32B37/02 ,  B32B2307/302 ,  B32B2457/08 ,  C25D5/10 ,  H01L2924/0002 ,  H05K1/05 ,  H05K3/421 ,  H05K2201/0338 ,  Y10T428/12535 ,  H01L2924/00

摘要： A thermal conductivity substrate including a metal substrate, a metal layer, an insulating layer, a plurality of conductive structures, a first conductive layer and a second conductive layer is provided. The metal layer is disposed on the metal substrate and entirely covers the metal substrate. The insulating layer is disposed on the metal layer. The conductive structures are embedded in the insulating layer and connected to a portion of the metal layer. The first conductive layer is disposed on the insulating layer. The second conductive layer is disposed on the first conductive layer and the conductive structures. The second conductive layer is electrically connected to a portion of the metal layer through the conductive structures. The second conductive layer and the conductive structures are integrally formed.

摘要翻译： 提供了包括金属基板，金属层，绝缘层，多个导电结构，第一导电层和第二导电层的导热性基板。 金属层设置在金属基板上，完全覆盖金属基板。 绝缘层设置在金属层上。 导电结构嵌入在绝缘层中并连接到金属层的一部分。 第一导电层设置在绝缘层上。 第二导电层设置在第一导电层和导电结构上。 第二导电层通过导电结构电连接到金属层的一部分。 第二导电层和导电结构整体形成。

公开(公告)号：US20100287448A1

公开(公告)日：2010-11-11

申请号：US12761526

申请日：2010-04-16

申请人： Jen-Yu HSU ,  Chien-Hung Wu

发明人： Jen-Yu HSU ,  Chien-Hung Wu

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： G06F11/1072 ,  G11C2029/0411

摘要： A flash memory device connected to a host includes: a flash memory; and a control circuit comprising a first error correcting code unit and a second error correcting code unit. The data length of a redundancy bit generated by the second error correcting code unit is longer than the data length of a redundancy bit generated by the first error correcting code unit. The first error correcting code unit is adopted to process with a data transmitted to the flash memory from the host when a damage risk of the flash memory is lower than a specific value; and the second error correcting code unit is adopted to process with the data transmitted to the flash memory from the host when the damage risk of the flash memory is higher than the specific value.

摘要翻译： 连接到主机的闪存设备包括：闪存; 以及包括第一纠错码单元和第二纠错码单元的控制电路。 由第二纠错码单元生成的冗余位的数据长度比由第一纠错码单元生成的冗余位的数据长度长。 当闪存的损坏风险低于特定值时，采用第一纠错码单元处理从主机发送到闪速存储器的数据; 并且当闪存的损坏风险高于特定值时，采用第二纠错码单元处理从主机发送到闪存的数据。

公开(公告)号：US07743277B2

公开(公告)日：2010-06-22

申请号：US11352654

申请日：2006-02-13

申请人： Hooshmand Torabi ,  Chien-Hung Wu

发明人： Hooshmand Torabi ,  Chien-Hung Wu

IPC分类号： G06F11/00

CPC分类号： G11C16/3418 ,  G11C16/102 ,  G11C16/3422

摘要： A data storage system using flash storage maintains a status indicator corresponding to data written into the flash storage. The status indictor of the data indicates whether a disruption, such as a power disruption or a device disconnection, occurred when the data was being written into the flash storage. The data storage system determines whether the data may be corrupted based on one or more of the status indictors. The data storage system may make this determination at a selected time or after a power-up of the data storage system. If the data is determined to possibly be corrupted, the data storage system may optionally discard the corrupted data from the flash storage or flag the corrupted data for future removal.

摘要翻译： 使用闪存存储的数据存储系统保持与写入闪存存储器的数据相对应的状态指示符。 数据的状态指示器指示当数据被写入闪存存储器时是否发生中断，例如电源中断或设备断开连接。 数据存储系统基于一个或多个状态指示来确定数据是否可能被破坏。 数据存储系统可以在选定的时间或在数据存储系统上电之后进行该确定。 如果数据被确定为可能被破坏，则数据存储系统可以可选地从闪存存储器中丢弃已损坏的数据，或者标记被破坏的数据以供将来去除。

公开(公告)号：US20060248243A1

公开(公告)日：2006-11-02

申请号：US11306812

申请日：2006-01-12

申请人： Kun-Chang Chang ,  Chih-Hsien Yang ,  Chien-Hung Wu ,  Yi-Chang Chang ,  Fu-Cheng Chen

发明人： Kun-Chang Chang ,  Chih-Hsien Yang ,  Chien-Hung Wu ,  Yi-Chang Chang ,  Fu-Cheng Chen

IPC分类号： G06F5/00 ,  G06F3/00

CPC分类号： G11B27/034 ,  G11B27/329 ,  G11B2220/216 ,  G11B2220/2562

摘要： A method for storage space allocation is disclosed. According to the present invention, the video data and the still picture data are recorded in a common storage area on a re-writable disc. When the still picture data is to be stored, it is recorded from the high-address end of the common storage area. On the other hand, when the video data is to be stored, it is recorded from the low-address end of the common area.

摘要翻译： 公开了一种用于存储空间分配的方法。 根据本发明，视频数据和静止图像数据被记录在可重写盘上的公共存储区域中。 当要存储静止图像数据时，从公共存储区域的高地址端记录。 另一方面，当要存储视频数据时，从公共区域的低地址端记录。

公开(公告)号：US20160095231A1

公开(公告)日：2016-03-31

申请号：US14603363

申请日：2015-01-23

申请人： Chien-Hung Wu

发明人： Chien-Hung Wu

IPC分类号： H05K3/46

CPC分类号： H05K3/4697 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4644 ,  H05K3/465 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913

摘要： A manufacturing method of a multi-layer circuit board having a cavity is provided, including the following steps: a core board is provided, and a through hole is formed penetrating the core board; two build-up structures are bonded to two opposite sides of the core board to foam the multi-layer circuit board, and the two build-up structures cover the through hole; and a portion of one of the two build-up structures corresponding to the through hole is removed to make the through hole communicate with the outside and form the cavity. A multi-layer circuit board having a cavity, manufactured by the aforementioned method, is also provided.

摘要翻译： 提供一种具有空腔的多层电路板的制造方法，包括以下步骤：设置芯板，并且形成穿透芯板的通孔; 两个堆积结构被结合到芯板的两个相对侧以使多层电路板发泡，并且两个堆积结构覆盖通孔; 并且去除与通孔相对应的两个堆积结构中的一个的一部分，以使通孔与外部连通并形成空腔。 还提供了通过上述方法制造的具有空腔的多层电路板。

公开(公告)号：USD716248S1

公开(公告)日：2014-10-28

申请号：US29432674

申请日：2012-09-19

申请人： Geoffrey Michael Hill ,  Chien-Hung Wu ,  Wen-Hao Liu ,  Claude Zellweger ,  Nichole Suzanne Rouillac ,  Tanatip Arunanondchai

设计人： Geoffrey Michael Hill ,  Chien-Hung Wu ,  Wen-Hao Liu ,  Claude Zellweger ,  Nichole Suzanne Rouillac ,  Tanatip Arunanondchai

公开(公告)号：US08237227B2

公开(公告)日：2012-08-07

申请号：US12455509

申请日：2009-06-03

申请人： Su-Chen Lai ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Harry Hak-Lay Chuang ,  Chiung-Han Yeh ,  Hong-Dyi Chang ,  Kuo Cheng Cheng ,  Chien-Hung Wu ,  Tzung-Chi Lee

发明人： Su-Chen Lai ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Harry Hak-Lay Chuang ,  Chiung-Han Yeh ,  Hong-Dyi Chang ,  Kuo Cheng Cheng ,  Chien-Hung Wu ,  Tzung-Chi Lee

IPC分类号： H01L21/70

CPC分类号： H01L21/823437 ,  H01L21/31053 ,  H01L21/3212 ,  H01L21/823828 ,  H01L27/08

摘要： A semiconductor device is provided which includes a semiconductor substrate having a first portion and a second portion, transistors formed in the first portion of the substrate, each transistor having a gate structure with a high-k dielectric and a metal gate, a device element formed in the second portion of the substrate, the device element being isolated by an isolation region, and a polishing stopper formed adjacent the isolation region and having a surface that is substantially planar with a surface of the gate structures of the transistors in the first region.

摘要翻译： 提供一种半导体器件，其包括具有第一部分和第二部分的半导体衬底，形成在衬底的第一部分中的晶体管，每个晶体管具有具有高k电介质和金属栅极的栅极结构，形成器件元件 在衬底的第二部分中，器件元件被隔离区域隔离，抛光停止件形成在隔离区域附近，并且具有与第一区域中的晶体管的栅极结构的表面基本平面的表面。