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    Semiconductor device and method of manufacturing the same
    1.
    发明申请
    Semiconductor device and method of manufacturing the same 审中-公开
    半导体装置及其制造方法

    公开(公告)号：US20120080805A1

    公开(公告)日：2012-04-05

    申请号：US13200654

    申请日：2011-09-28

    申请人： Chikako Ohto ,  Tatsuya Usami ,  Shuji Nagano ,  Hideharu Shimizu ,  Tatsuya Ohira ,  Takeshi Kada

    发明人： Chikako Ohto ,  Tatsuya Usami ,  Shuji Nagano ,  Hideharu Shimizu ,  Tatsuya Ohira ,  Takeshi Kada

    IPC分类号： H01L23/48 ,  H01L21/28

    CPC分类号： H01L21/76834 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/76835

    摘要： A semiconductor device according to the invention includes a first Cu interconnect and a first barrier insulating film. a The first barrier insulating film is provided on the first Cu interconnect, and prevents Cu from being diffused from the first Cu interconnect. In addition, the semiconductor device includes a second Cu interconnect and a second barrier insulating film on the first barrier insulating film. The second barrier insulating film is provided on a first Cu interconnect, and prevents Cu from being diffused from the second Cu interconnect. The first and second barrier insulating films are made of a silicon-based insulating film having a branched alkyl group and a carbon-carbon double bond.

    摘要翻译： 根据本发明的半导体器件包括第一Cu互连和第一阻挡绝缘膜。 a第一阻挡绝缘膜设置在第一Cu互连上，并且防止Cu从第一Cu互连扩散。 此外，半导体器件在第一阻挡绝缘膜上包括第二Cu互连和第二阻挡绝缘膜。 第二阻挡绝缘膜设置在第一Cu互连上，并且防止Cu从第二Cu互连扩散。 第一和第二阻挡绝缘膜由具有支链烷基和碳 - 碳双键的硅基绝缘膜制成。

    Method of forming semiconductor device having seal ring structure
    4.
    发明授权
    Method of forming semiconductor device having seal ring structure 有权
    形成具有密封环结构的半导体器件的方法

    公开(公告)号：US08617914B2

    公开(公告)日：2013-12-31

    申请号：US13137847

    申请日：2011-09-16

    申请人： Tatsuya Usami

    发明人： Tatsuya Usami

    IPC分类号： H01L21/00

    CPC分类号： H01L21/76811 ,  H01L21/76808 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of producing a semiconductor device includes forming, on a first insulating film formed on a substrate, a first groove in an element-forming region to form one of a via and a wiring therein, and a first seal ring groove in a seal ring part, forming one of a via and a wiring in the first groove and a first metal layer in the first seal ring groove, and then removing the metal material in a part exposed to an outside of the first groove and the first seal ring groove, forming a second insulating film on the first insulating film, forming, on the second insulating film, a second groove, and a second seal ring groove in the seal ring part on the first seal ring groove, and forming one of a via and a wiring in the second groove and a second metal layer.

    摘要翻译： 一种制造半导体器件的方法包括在形成在基板上的第一绝缘膜上形成元件形成区域中的第一槽，以在其中形成通孔和布线之一，以及密封环中的第一密封环槽 在第一槽中形成通孔和配线之一，在第一密封环槽中形成第一金属层，然后在暴露于第一槽和第一密封环槽的外侧的部分除去金属材料， 在所述第一绝缘膜上形成第二绝缘膜，在所述第二绝缘膜上形成所述第一密封环槽中的所述密封环部分中的第二槽和第二密封环槽，并且形成通孔和布线 在第二槽和第二金属层中。

    Semiconductor device and manufacturing process therefor
    5.
    发明授权
    Semiconductor device and manufacturing process therefor 有权
    半导体器件及其制造工艺

    公开(公告)号：US07969010B2

    公开(公告)日：2011-06-28

    申请号：US11362110

    申请日：2006-02-27

    申请人： Tatsuya Usami

    发明人： Tatsuya Usami

    IPC分类号： H01L21/31

    CPC分类号： H01L21/7682 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76889 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： A semiconductor device has a semiconductor substrate, a first interconnect made of a copper-containing metal which is formed over the semiconductor substrate, a conductive first plug formed over the first interconnect and connected to the first interconnect, a Cu silicide layer over the first interconnect in an area other than the area where the first plug is formed, a Cu silicide layer over the first plug, and a first porous MSQ film formed over an area from the side surface of the first interconnect to the side surface of the first plug and covering the side surface of the first interconnect, the upper portion of the first interconnect and the side surface of the first plug.

    摘要翻译： 半导体器件具有半导体衬底，由半导体衬底上形成的含铜金属制成的第一互连，形成在第一互连上并连接到第一互连的导电第一插塞，第一互连上的铜硅化物层 在除了形成第一插头的区域之外的区域中，在第一插头上方的Cu硅化物层和形成在从第一互连的侧表面到第一插头的侧表面的区域上的第一多孔MSQ膜，以及 覆盖第一互连的侧表面，第一互连的上部和第一插塞的侧表面。

    Method of manufacturing a semiconductor device
    7.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US07615498B2

    公开(公告)日：2009-11-10

    申请号：US11655261

    申请日：2007-01-19

    申请人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

    发明人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/76835 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76832

    摘要： A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO2 film 212 and a SiCN film 214 formed thereon. The first SiOC film 204 has a barrier metal layer 216 and via 218 formed therein, and the second SiOC film 210 has a barrier metal layer 220 and wiring metal layer 222 formed therein. Carbon content of the second SiOC film 210 is adjusted larger than that of the first SiOC film 204. This makes it possible to improve adhesiveness of the insulating interlayer with other insulating layers, while keeping a low dielectric constant of the insulating interlayer.

    摘要翻译： 半导体器件200包括形成在半导体衬底（未示出）上的SiCN膜202，形成在其上的第一SiOC膜204，形成在其上的SiCN膜208，形成在其上的第二SiOC膜210，SiO 2膜212和SiCN膜 214。 第一SiOC膜204具有形成在其中的阻挡金属层216和通孔218，并且第二SiOC膜210具有形成在其中的阻挡金属层220和布线金属层222。 第二SiOC膜210的碳含量被调节为大于第一SiOC膜204的碳含量。这使得可以在保持绝缘夹层的低介电常数的同时，改善绝缘中间层与其它绝缘层的粘附性。

    Semiconductor device
    9.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07531891B2

    公开(公告)日：2009-05-12

    申请号：US11006529

    申请日：2004-12-08

    申请人： Koichi Ohto ,  Tatsuya Usami ,  Yoichi Sasaki

    发明人： Koichi Ohto ,  Tatsuya Usami ,  Yoichi Sasaki

    IPC分类号： H01L23/58 ,  H01L29/00 ,  H01L21/31

    CPC分类号： H01L21/76801 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S438/931 ,  H01L2924/00

    摘要： A semiconductor device having improved adhesiveness between films composing an interlayer insulating film is presented by providing multilayered films in the interlayer insulating films having film density distribution, in which the film density is gradually changes. A SiOC film is deposited to a thickness of 300 nm via a plasma CVD process, in which a flow rate of trimethylsilane gas is stepwise increased. In this case, the film density of the deposited SiOC film is gradually decreased by stepwise increasing the flow rate of trimethylsilane gas. Since trimethylsilane contains methyl group, trimethylsilane has more bulky molecular structure in comparison with monosilane or the like. Thus, the film density is decreased by increasing the amount of trimethylsilane in the reactant gas.

    摘要翻译： 通过在具有膜密度分布的层间绝缘膜中提供多层膜，其中膜密度逐渐变化，提供了具有改善的构成层间绝缘膜的膜之间粘附性的半导体器件。 通过等离子体CVD工艺沉积厚度为300nm的SiOC膜，其中三甲基硅烷气体的流量逐步增加。 在这种情况下，通过逐步增加三甲基硅烷气体的流量，沉积的SiOC膜的膜密度逐渐降低。 由于三甲基硅烷含有甲基，因此与甲硅烷等相比，三甲基硅烷具有更大的分子结构。 因此，通过增加反应气体中的三甲基硅烷的量来降低膜密度。

    Semiconductor device having seal ring structure and method of forming the same
    10.
    发明申请
    Semiconductor device having seal ring structure and method of forming the same 失效
    具有密封环结构的半导体器件及其形成方法

    公开(公告)号：US20090051011A1

    公开(公告)日：2009-02-26

    申请号：US12219527

    申请日：2008-07-23

    申请人： Tatsuya Usami

    发明人： Tatsuya Usami

    IPC分类号： H01L29/06 ,  H01L21/4763

    CPC分类号： H01L21/76811 ,  H01L21/76808 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device of the present invention includes a seal ring structure. The seal ring structure includes a first metal layer including a though hole, the through hole having a bottom portion filled with an insulating material, and a second metal layer formed on the first metal layer. The second metal layer has a projected portion projecting from a bottom of the second metal layer and the projected portion is inserted into a top portion of the through hole.

    摘要翻译： 本发明的半导体器件包括密封环结构。 所述密封环结构包括包括通孔的第一金属层，所述通孔具有填充有绝缘材料的底部，以及形成在所述第一金属层上的第二金属层。 第二金属层具有从第二金属层的底部突出的突出部分，并且突出部分插入到通孔的顶部。