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公开(公告)号：US20140226285A1
公开(公告)日：2014-08-14
申请号：US14239990
申请日：2012-08-10
IPC分类号： H05K5/06
CPC分类号： H05K5/066 , B81B7/0058 , B81B2207/093 , B81C2203/035 , H01L23/10 , H01L23/3121 , H01L24/16 , H01L2224/1134 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2924/12042 , H01L2924/1461 , H01L2924/00014 , H01L2924/014 , H01L2924/00
摘要： A component includes a substrate, a chip, and a frame. The frame, the substrate, and the chip enclose a volume. A metal sealing layer is provided which is designed to hermetically seal the volume. The metal sealing layer has a hardened liquid metal or a hardened liquid metal alloy.
摘要翻译： 组件包括衬底，芯片和框架。 框架，基板和芯片包围一个体积。 提供了一种金属密封层，其被设计成气密地密封容积。 金属密封层具有硬化液态金属或硬化液态金属合金。
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公开(公告)号：US09382110B2
公开(公告)日：2016-07-05
申请号：US13818916
申请日：2011-07-29
申请人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
发明人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
CPC分类号： B81B7/0077 , B81B2207/093 , B81C1/00269 , B81C1/00333 , B81C2203/0109 , B81C2203/0118 , H01L2224/16225 , H01L2224/8114 , H01L2924/1461 , H01L2924/00
摘要： A component includes a substrate, a chip and a frame. The frame is bonded to the substrate and the chip rests on the frame. A sealing layer on parts of the frame and the chip is designed to hermetically seal a volume enclosed by the substrate, the chip and the metal frame.
摘要翻译： 部件包括基板，芯片和框架。 框架结合到基板，芯片搁置在框架上。 框架和芯片的部件上的密封层被设计成密封由衬底，芯片和金属框架包围的体积。
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3.发明授权公开(公告)号：US08759677B2
公开(公告)日：2014-06-24
申请号：US12993299
申请日：2009-05-26
申请人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
发明人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
CPC分类号： H01L23/06 , B81B7/0077 , B81C2203/0136 , H01L23/053 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： Frames (3) applied on a wafer (1) are leveled and covered with a covering film, such that gas-tight housings are formed for component structures (5), in particular for filter or MEMS structures. Inner columns (4) can be provided for supporting the housing and for the ground connection; outer columns (4) can be provided for the electrical connection and are connected to the component structures by means of conductor tracks (6) that are electrically insulated from the frames (3).
摘要翻译： 施加在晶片（1）上的框架（3）被平整并用覆盖膜覆盖，使得形成用于组件结构（5）的气密壳体，特别是用于过滤器或MEMS结构。 可以提供内柱（4）用于支撑壳体和接地连接; 可以为电连接提供外柱（4），并且通过与框架（3）电绝缘的导体轨道（6）连接到部件结构。
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4.发明申请公开(公告)号：US20110114355A1
公开(公告)日：2011-05-19
申请号：US12993299
申请日：2009-05-26
申请人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
发明人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
IPC分类号： H05K5/06
CPC分类号： H01L23/06 , B81B7/0077 , B81C2203/0136 , H01L23/053 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： Frames (3) applied on a wafer (1) are leveled and covered with a covering film, such that gas-tight housings are formed for component structures (5), in particular for filter or MEMS structures. Inner columns (4) can be provided for supporting the housing and for the ground connection; outer columns (4) can be provided for the electrical connection and are connected to the component structures by means of conductor tracks (6) that are electrically insulated from the frames (3).
摘要翻译： 施加在晶片（1）上的框架（3）被平整并用覆盖膜覆盖，使得形成用于组件结构（5）的气密壳体，特别是用于过滤器或MEMS结构。 可以提供内柱（4）用于支撑壳体和接地连接; 可以为电连接提供外柱（4），并且通过与框架（3）电绝缘的导体轨道（6）连接到部件结构。
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公开(公告)号：US09647196B2
公开(公告)日：2017-05-09
申请号：US14007074
申请日：2012-03-28
申请人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl , Wolfgang Pahl , Robert Koch
发明人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl , Wolfgang Pahl , Robert Koch
IPC分类号： H01L41/053 , B81C1/00 , H03H9/10 , H01L41/25 , H01L23/00
CPC分类号： H01L41/053 , B81B2207/095 , B81C1/00301 , H01L24/11 , H01L41/25 , H01L2224/1134 , H01L2924/01322 , H01L2924/12042 , H01L2924/1461 , H03H9/1071 , Y10T29/42 , H01L2924/00 , H01L2924/00014
摘要： A hermetic wafer-level package composed of two piezoelectric wafers, preferably identical in terms of material, and a production method therefor are presented. The electrical and mechanical connection between the two wafers is accomplished with frame structures and pillars, the partial structures of which, distributed between two wafers, are wafer-bonded with the aid of connecting layers.
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公开(公告)号：US20140111062A1
公开(公告)日：2014-04-24
申请号：US14007074
申请日：2012-03-28
申请人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl , Wolfgang Pahl , Robert Koch
发明人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl , Wolfgang Pahl , Robert Koch
IPC分类号： H01L41/053 , H01L41/25
CPC分类号： H01L41/053 , B81B2207/095 , B81C1/00301 , H01L24/11 , H01L41/25 , H01L2224/1134 , H01L2924/01322 , H01L2924/12042 , H01L2924/1461 , H03H9/1071 , Y10T29/42 , H01L2924/00 , H01L2924/00014
摘要： A hermetic wafer-level package composed of two piezoelectric wafers, preferably identical in terms of material, and a production method therefor are presented. The electrical and mechanical connection between the two wafers is accomplished with frame structures and pillars, the partial structures of which, distributed between two wafers, are wafer-bonded with the aid of connecting layers.
摘要翻译： 提出了由两个压电晶片组成的密封晶片级封装，其优选在材料方面是相同的及其制造方法。 两个晶片之间的电气和机械连接通过框架结构和支柱实现，其框架结构和支柱分布在两个晶片之间的部分结构借助于连接层进行晶片结合。
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公开(公告)号：US20130214405A1
公开(公告)日：2013-08-22
申请号：US13818916
申请日：2011-07-29
申请人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
发明人： Christian Bauer , Hans Krueger , Juergen Portmann , Alois Stelzl
CPC分类号： B81B7/0077 , B81B2207/093 , B81C1/00269 , B81C1/00333 , B81C2203/0109 , B81C2203/0118 , H01L2224/16225 , H01L2224/8114 , H01L2924/1461 , H01L2924/00
摘要： A component includes a substrate, a chip and a frame. The frame is bonded to the substrate and the chip rests on the frame. A sealing layer on parts of the frame and the chip is designed to hermetically seal a volume enclosed by the substrate, the chip and the metal frame.
摘要翻译： 部件包括基板，芯片和框架。 框架结合到基板，芯片搁置在框架上。 框架和芯片的部件上的密封层被设计成密封由衬底，芯片和金属框架包围的体积。
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公开(公告)号：US09165905B2
公开(公告)日：2015-10-20
申请号：US13330422
申请日：2011-12-19
申请人： Hans Krueger , Alexander Schmajew , Alois Stelzl
发明人： Hans Krueger , Alexander Schmajew , Alois Stelzl
CPC分类号： H01L24/94 , B81B7/007 , B81B2207/098 , H01L24/24 , H01L24/82 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/24011 , H01L2224/24051 , H01L2224/24147 , H01L2224/24991 , H01L2224/94 , H01L2225/06513 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/1068 , H01L2924/14 , H01L2924/1461 , Y10T29/49126 , H01L2224/81 , H01L2224/82
摘要： A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.
摘要翻译： 公开了彼此连接的多个未封装的基板。 第一基板的第一主区域和/或第一主区域中的阶梯结构包括多个集成电路。 阶梯式结构在集成电路之间运行。 第一导体轨道从各个集成电路的至少一些接触连接延伸到阶梯式结构。 第一基板在第一主区域的一侧连接到另一基板。 第一基板从与第一主区域相对的第二主区域切断，使得第一基板被分成多个基板块。 每个衬底片具有一个集成电路。 第一导体轨迹可在基片之间的间隙中接近。 第二导体轨道由第二主区域形成。 至少一些第二导体轨道从第二主区域超过衬底片的侧壁延伸，直到第一导体轨迹。
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公开(公告)号：US20120159778A1
公开(公告)日：2012-06-28
申请号：US13330422
申请日：2011-12-19
申请人： Hans Krueger , Alexander Schmajew , Alois Stelzl
发明人： Hans Krueger , Alexander Schmajew , Alois Stelzl
IPC分类号： H05K3/36
CPC分类号： H01L24/94 , B81B7/007 , B81B2207/098 , H01L24/24 , H01L24/82 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/24011 , H01L2224/24051 , H01L2224/24147 , H01L2224/24991 , H01L2224/94 , H01L2225/06513 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/1068 , H01L2924/14 , H01L2924/1461 , Y10T29/49126 , H01L2224/81 , H01L2224/82
摘要： A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.
摘要翻译： 公开了彼此连接的多个未封装的基板。 第一基板的第一主区域和/或第一主区域中的阶梯结构包括多个集成电路。 阶梯式结构在集成电路之间运行。 第一导体轨道从各个集成电路的至少一些接触连接延伸到阶梯式结构。 第一基板在第一主区域的一侧连接到另一基板。 第一基板从与第一主区域相对的第二主区域切断，使得第一基板被分成多个基板块。 每个衬底片具有一个集成电路。 第一导体轨迹可在基片之间的间隙中接近。 第二导体轨道由第二主区域形成。 至少一些第二导体轨道从第二主区域超过衬底片的侧壁延伸，直到第一导体轨迹。
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公开(公告)号：US20090104415A1
公开(公告)日：2009-04-23
申请号：US12258301
申请日：2008-10-24
申请人： Alexander Schmajew , Hans Krueger , Alois Stelzl
发明人： Alexander Schmajew , Hans Krueger , Alois Stelzl
IPC分类号： B32B7/06 , B32B3/10 , H01L21/311 , B44C1/22
CPC分类号： H01L23/544 , B41M5/24 , H01L23/3171 , H01L23/3192 , H01L2223/54406 , H01L2223/5448 , H01L2924/0002 , Y10T428/24802 , Y10T428/24893 , Y10T428/24901 , H01L2924/00
摘要： A layer combination with a marking is proposed, for example, for a miniaturized electrical component. The layer combination includes a first layer and a different release layer, which is applied on it, on which a pattern is formed by a released pattern-like area. The release area is formed from an inorganic, semiconducting, insulating material, where the pattern produced thereon is machine-readable.
摘要翻译： 提出了具有标记的层组合，例如，用于小型化电气部件。 层组合包括施加在其上的第一层和不同的剥离层，其上由释放的图案状区域形成图案。 释放区域由无机半导体绝缘材料形成，其中在其上产生的图案是机器可读的。
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