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1.发明授权Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy 有权在松弛晶格失配外延期间减少位错堆积形成公开(公告)号：US07594967B2
公开(公告)日：2009-09-29
申请号：US10268425
申请日：2002-10-10
IPC分类号： C30B25/00
CPC分类号： H01L21/0262 , H01L21/02381 , H01L21/02439 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , Y10S117/902 , Y10S117/913
摘要： A semiconductor structure including a cap layer formed over a semiconductor substrate having a rough edge, which discourages formation of dislocation pile-up defects.
摘要翻译： 一种半导体结构，包括形成在具有粗糙边缘的半导体衬底上的覆盖层，其阻止形成位错堆积缺陷。
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公开(公告)号：US07408214B2
公开(公告)日：2008-08-05
申请号：US10947909
申请日：2004-09-23
IPC分类号： H01L21/8242
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译： DRAM槽电容器尤其通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域而形成。
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3.发明申请Method of forming multiple gate insulators on a strained semiconductor heterostructure 有权在应变半导体异质结构上形成多个栅绝缘体的方法公开(公告)号：US20050098774A1
公开(公告)日：2005-05-12
申请号：US11015266
申请日：2004-12-17
申请人： Anthony Lochtefeld , Mayank Bulsara
发明人： Anthony Lochtefeld , Mayank Bulsara
IPC分类号： H01L29/10 , H01L29/423 , H01L29/06
CPC分类号： H01L29/1054 , H01L29/42364
摘要： A method is disclosed for forming multiple gate insulators on a strained semiconductor heterostructure as well as the devices and circuits formed therefrom. In an embodiment, the method includes the steps of depositing a first insulators on the strained semiconductor heterostructure, removing at least a portion of the first insulators from the strained semiconductor heterostructure, and depositing a second insulators on the strained semiconductor heterostructure.
摘要翻译： 公开了一种用于在应变半导体异质结构上形成多个栅极绝缘体的方法以及由其形成的器件和电路。 在一个实施例中，该方法包括以下步骤：在应变半导体异质结构上沉积第一绝缘体，从应变半导体异质结构去除至少一部分第一绝缘体，以及在应变半导体异质结构上沉积第二绝缘体。
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公开(公告)号：US20050067647A1
公开(公告)日：2005-03-31
申请号：US10966959
申请日：2004-10-15
IPC分类号： H01L21/8242 , H01L29/94 , H01L21/20 , H01L27/108 , H01L29/76 , H01L31/119
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译： 尤其是通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域形成的DRAM沟槽电容器。
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5.发明申请公开(公告)号：US20120302032A1
公开(公告)日：2012-11-29
申请号：US13568894
申请日：2012-08-07
IPC分类号： H01L21/02
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译： DRAM槽电容器尤其通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域而形成。
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公开(公告)号：US20050035389A1
公开(公告)日：2005-02-17
申请号：US10947909
申请日：2004-09-23
IPC分类号： H01L21/8242 , H01L29/94 , H01L27/108 , H01L29/76 , H01L31/119
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译： 尤其是通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域形成的DRAM沟槽电容器。
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公开(公告)号：US06891209B2
公开(公告)日：2005-05-10
申请号：US10218007
申请日：2002-08-13
IPC分类号： H01L21/8242 , H01L29/94 , H01L27/148
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
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公开(公告)号：US06849508B2
公开(公告)日：2005-02-01
申请号：US10165014
申请日：2002-06-07
申请人： Anthony Lochtefeld , Mayank Bulsara
发明人： Anthony Lochtefeld , Mayank Bulsara
IPC分类号： H01L29/10 , H01L29/423 , H01L21/335 , H01L21/8234
CPC分类号： H01L29/1054 , H01L29/42364
摘要： A method is disclosed for forming multiple gate insulators on a strained semiconductor heterostructure as well as the devices and circuits formed therefrom. In an embodiment, the method includes the steps of depositing a first insulators on the strained semiconductor heterostructure, removing at least a portion of the first insulators from the strained semiconductor heterostructure, and depositing a second insulators on the strained semiconductor heterostructure.
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公开(公告)号：US06594293B1
公开(公告)日：2003-07-15
申请号：US09779917
申请日：2001-02-08
IPC分类号： H01L3300
CPC分类号： C30B25/02 , C30B25/20 , C30B29/40 , C30B29/42 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02546
摘要： A method of processing semiconductor materials and a corresponding semiconductor structure, including providing a virtual substrate of a GaAs epitaxial film on a Si substrate, and epitaxailly growing a relaxed graded layer of InxGal-xAs at a temperature ranging upwards from about 600° C. with a subsequent process for planarization of the InGaAs alloy.
摘要翻译： 一种处理半导体材料的方法和相应的半导体结构，包括在Si衬底上提供GaAs外延膜的虚拟衬底，并且在约600℃的温度范围内将In x Ga 1-x As的弛豫梯度层上升生长， 用于使InGaAs合金平坦化的后续工艺。
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公开(公告)号：US08253181B2
公开(公告)日：2012-08-28
申请号：US12167828
申请日：2008-07-03
IPC分类号： H01L29/94
CPC分类号： H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/10897 , H01L28/40 , H01L29/1054 , H01L29/7849 , H01L29/945
摘要： DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
摘要翻译： 尤其通过将导电材料沉积到沟槽中或掺杂限定沟槽的半导体区域而形成的DRAM沟槽电容器。
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