Methods and apparatus for placing substrates in contact with molten solder
    6.
    发明申请
    Methods and apparatus for placing substrates in contact with molten solder 有权
    将基板放置在与熔融焊料接触的方法和装置

    公开(公告)号:US20060043154A1

    公开(公告)日:2006-03-02

    申请号:US11140420

    申请日:2005-05-27

    IPC分类号: B23K31/02 B23K1/08

    摘要: Methods and devices for placing a semiconductor wafer or other substrate in contact with solder are described. A wave soldering apparatus includes a solder bath, a nozzle for producing a solder wave, and a jig for orienting a substrate in a substantially vertical orientation and placing the substrate in contact with a cascading solder wave. In another wave soldering apparatus, a jig orients a semiconductor wafer in a substantially horizontal orientation in contact with the solder wave. Another soldering apparatus includes a tank comprising molten solder and a fixture configured to orient one or more semiconductor wafers in a substantially vertical orientation. Methods of placing semiconductor wafers or other substrates in contact with solder using the devices of the present invention are also disclosed.

    摘要翻译: 描述了将半导体晶片或其它基板与焊料接触的方法和装置。 波峰焊装置包括焊料槽,用于产生焊波的喷嘴和用于使基板垂直定向的夹具,并使基板与级联焊波接触。 在另一种波峰焊装置中,夹具使得与焊波接触的大致水平取向的半导体晶片。 另一个焊接装置包括一个包含熔融焊料和一个被配置为使一个或多个半导体晶片呈基本垂直取向取向的夹具的罐。 还公开了使用本发明的装置将半导体晶片或其它基板与焊料接触的方法。

    Test socket, test system and test method for semiconductor components with serviceable nest
    7.
    发明申请
    Test socket, test system and test method for semiconductor components with serviceable nest 失效
    测试插座,测试系统和带可维护的嵌套的半导体元件的测试方法

    公开(公告)号:US20060012389A1

    公开(公告)日:2006-01-19

    申请号:US11229169

    申请日:2005-09-16

    申请人: Daniel Cram

    发明人: Daniel Cram

    IPC分类号: G01R31/02

    CPC分类号: G01R1/0491

    摘要: A test socket for a semiconductor component includes a base, a movable lid, socket contacts for electrically engaging terminal contacts on the component, and a retention mechanism for the component. The test socket is movable from a loading/unloading position, in which the component can be loaded or unloaded, to a testing position, in which the component is retained by the retention mechanism in electrical communication with the socket contacts. The test socket also includes a nest for aligning the component, which is configured for removal or installation in the testing position of the test socket without interference from the retention mechanism. A test method includes the steps of providing the test socket, removing the nest and installing a replacement nest with the test socket in the testing position, and testing a different component using the replacement nest. A test system includes a burn-in board, the test socket on the burn-in board, and a testing circuitry in electrical communication with the burn-in board.

    摘要翻译: 用于半导体部件的测试插座包括基座,可移动盖,用于电连接部件上的端子触点的插座触点和用于该部件的保持机构。 测试插座可以从组件可以装载或卸载的装载/卸载位置移动到测试位置,在该位置,组件被保持机构保持,与插座触点电连通。 测试插座还包括用于对准组件的嵌套,其被构造成用于移除或安装在测试插座的测试位置,而不会受到保持机构的干扰。 测试方法包括以下步骤:提供测试插座,移除嵌套并将测试插座安装在测试位置,并使用替换套件测试不同的组件。 测试系统包括老化板,老化板上的测试插座以及与老化板进行电气通信的测试电路。

    Method and apparatus for processing semiconductor devices in a singulated form
    8.
    发明申请
    Method and apparatus for processing semiconductor devices in a singulated form 失效
    以单数形式处理半导体器件的方法和装置

    公开(公告)号:US20050017739A1

    公开(公告)日:2005-01-27

    申请号:US10919667

    申请日:2004-08-16

    摘要: Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.

    摘要翻译: 为半导体器件的处理和测试提供了改进的方法和设备。 一个实施例包括用于一个或多个具有非常细间距的电I / O(输入/输出)元件的半导体管芯的管芯载体。 半导体裸片以单一形式临时附接到模具载体,以便能够用常规接触技术测试骰子。 模具载体可以包括柔性电路基底基板和刚性支撑框架。 另外的实施例包括用于将半导体管芯附接到管芯载体并用于在测试期间提供与半导体管芯的临时电连接的材料和方法。 用于提供临时电连接的示例性材料可以包括导电膜或带,导电或导体填充的环氧树脂或基于RTV粘合剂的材料,浸渍有导电填料或非回流焊膏的水溶性材料。

    METHODS FOR PLACING SUBSTRATES IN CONTACT WITH MOLTEN SOLDER
    9.
    发明申请
    METHODS FOR PLACING SUBSTRATES IN CONTACT WITH MOLTEN SOLDER 审中-公开
    用于安装与MOLTEN SOLDER接触的基板的方法

    公开(公告)号:US20080011815A1

    公开(公告)日:2008-01-17

    申请号:US11777137

    申请日:2007-07-12

    IPC分类号: B23K31/02

    摘要: Methods and devices for placing a semiconductor wafer or other substrate in contact with solder are described. A wave soldering apparatus includes a solder bath, a nozzle for producing a solder wave, and a jig for orienting a substrate in a substantially vertical orientation and placing the substrate in contact with a cascading solder wave. In another wave soldering apparatus, a jig orients a semiconductor wafer in a substantially horizontal orientation in contact with the solder wave. Another soldering apparatus includes a tank comprising molten solder and a fixture configured to orient one or more semiconductor wafers in a substantially vertical orientation. Methods of placing semiconductor wafers or other substrates in contact with solder using the devices of the present invention are also disclosed.

    摘要翻译: 描述了将半导体晶片或其它基板与焊料接触的方法和装置。 波峰焊装置包括焊料槽,用于产生焊波的喷嘴和用于使基板垂直定向的夹具,并使基板与级联焊波接触。 在另一种波峰焊装置中,夹具使得与焊波接触的大致水平取向的半导体晶片。 另一个焊接装置包括一个包含熔融焊料和一个被配置为使一个或多个半导体晶片呈基本垂直取向取向的夹具的罐。 还公开了使用本发明的装置将半导体晶片或其它基板与焊料接触的方法。

    Methods for processing semiconductor devices in a singulated form
    10.
    发明申请
    Methods for processing semiconductor devices in a singulated form 有权
    用于以单一形式处理半导体器件的方法

    公开(公告)号:US20070155029A1

    公开(公告)日:2007-07-05

    申请号:US11599194

    申请日:2006-11-13

    IPC分类号: H01L21/66 G01R31/26

    摘要: Improved methods and apparatus are provided for the handling and testing of semiconductor devices. One embodiment comprises a die carrier for one or more semiconductor dice having very fine pitch electrical I/O (input/output) elements. The semiconductor dice are temporarily attached to the die carrier in singulated form to enable testing the dice with conventional contact technology. The die carrier may include a flex circuit base substrate and a rigid support frame. Further embodiments comprise materials and methods for attaching the semiconductor dice to the die carrier and for providing a temporary electrical connection with the semiconductor dice during testing. Exemplary materials for providing the temporary electrical connection may comprise a conductive film or tape, a conductive or conductor-filled epoxy, resin or RTV adhesive-based materials, a water-soluble material impregnated with a conductive filler or non-reflowed solder paste.

    摘要翻译: 为半导体器件的处理和测试提供了改进的方法和设备。 一个实施例包括用于一个或多个具有非常细间距的电I / O(输入/输出)元件的半导体管芯的管芯载体。 半导体裸片以单一形式临时附接到模具载体,以便能够用常规接触技术测试骰子。 模具载体可以包括柔性电路基底基板和刚性支撑框架。 另外的实施例包括用于将半导体管芯附接到管芯载体并用于在测试期间提供与半导体管芯的临时电连接的材料和方法。 用于提供临时电连接的示例性材料可以包括导电膜或带,导电或导体填充的环氧树脂或基于RTV粘合剂的材料,浸渍有导电填料或非回流焊膏的水溶性材料。