公开(公告)号：US09093395B2

公开(公告)日：2015-07-28

申请号：US13225345

申请日：2011-09-02

申请人： David P. Bour ,  Linda Romano ,  Thomas R. Prunty ,  Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown

发明人： David P. Bour ,  Linda Romano ,  Thomas R. Prunty ,  Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown

IPC分类号： H01L29/20 ,  H01L21/302 ,  H01L29/32 ,  H01L29/66 ,  H01L29/808 ,  H01L29/861 ,  H01L29/872

CPC分类号： H01L29/32 ,  H01L21/02389 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/6609 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/66446 ,  H01L29/66909 ,  H01L29/66924 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer.

摘要翻译： 二极管包括以第一位错密度和第一导电类型为特征的衬底，耦合到衬底的第一触点和具有预定厚度并耦合到半导体衬底的掩模层。 掩模层包括多个连续部分和暴露基板并设置在连续部分之间的多个开口。 二极管还包括大于5μm厚的外延层，其与衬底和掩模层耦合。 外延层包括覆盖多个开口的第一组区域，其特征在于第二位错密度和覆盖该组连续区段的第二组区域，其特征在于第三位错密度小于第一位错密度和第二位错 密度。 二极管还包括耦合到外延层的第二接触。

公开(公告)号：US20130087878A1

公开(公告)日：2013-04-11

申请号：US13270625

申请日：2011-10-11

申请人： Andrew P. Edwards ,  Hui Nie ,  Isik C. Kizilyalli ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Andrew P. Edwards ,  Hui Nie ,  Isik C. Kizilyalli ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L29/47 ,  H01L21/20

CPC分类号： H01L29/66143 ,  H01L21/046 ,  H01L21/0495 ,  H01L29/2003 ,  H01L29/47 ,  H01L29/475 ,  H01L29/868 ,  H01L29/872

摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.

摘要翻译： 半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括III族氮化物外延结构，其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。 多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。 半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。 在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

公开(公告)号：US09184305B2

公开(公告)日：2015-11-10

申请号：US13198655

申请日：2011-08-04

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L21/337 ,  H01L29/808 ,  H01L29/10 ,  H01L29/66 ,  H01L29/20

CPC分类号： H01L29/8083 ,  H01L29/1066 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66909 ,  H01L29/66924

摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

摘要翻译： 垂直III族氮化物场效应晶体管包括：包含第一III族氮化物材料的漏极，与漏极电耦合的漏极接触点;以及漂移区域，包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区，该沟道区包括耦合到漂移区的第三III族氮化物材料，至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。 沟道区域沿着垂直方向设置在漏极和源极之间，使得垂直III族氮化物场效应晶体管的工作期间的电流沿着垂直方向。

公开(公告)号：US08502234B2

公开(公告)日：2013-08-06

申请号：US13289219

申请日：2011-11-04

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L31/0256 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/66909 ,  H01L21/823487 ,  H01L27/0605 ,  H01L27/0611 ,  H01L27/0629 ,  H01L27/0727 ,  H01L27/098 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/8083 ,  H01L29/872

摘要： An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.

公开(公告)号：US20130032813A1

公开(公告)日：2013-02-07

申请号：US13198661

申请日：2011-08-04

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L29/66909 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66212 ,  H01L29/66893 ,  H01L29/66924 ,  H01L29/8083 ,  H01L29/872

摘要： A method of growing a III-nitride-based epitaxial structure includes providing a substrate in an epitaxial growth reactor and heating the substrate to a predetermined temperature. The method also includes flowing a gallium-containing gas into the epitaxial growth reactor and flowing a nitrogen-containing gas into the epitaxial growth reactor. The method further includes flowing a gettering gas into the epitaxial growth reactor. The predetermined temperature is greater than 1000° C.

摘要翻译： 生长III族氮化物基外延结构的方法包括在外延生长反应器中提供衬底并将衬底加热至预定温度。 该方法还包括将含镓气体流入外延生长反应器并将含氮气体流入外延生长反应器中。 该方法还包括将吸气气体流入外延生长反应器。 预定温度大于1000℃

公开(公告)号：US09159784B2

公开(公告)日：2015-10-13

申请号：US13299227

申请日：2011-11-17

申请人： Linda Romano ,  Andrew P. Edwards ,  Richard J. Brown ,  David P. Bour ,  Hui Nie ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Mahdan Raj

发明人： Linda Romano ,  Andrew P. Edwards ,  Richard J. Brown ,  David P. Bour ,  Hui Nie ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Mahdan Raj

IPC分类号： H01L29/872 ,  H01L29/06 ,  H01L29/66 ,  H01L29/778 ,  H01L21/306 ,  H01L29/47 ,  H01L29/20 ,  H01L29/10

CPC分类号： H01L29/7787 ,  H01L21/30621 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/475 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/872

摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure.

公开(公告)号：US08969912B2

公开(公告)日：2015-03-03

申请号：US13198659

申请日：2011-08-04

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L29/74 ,  H01L31/0328 ,  H01L29/80 ,  H01L29/76 ,  H01L21/8238 ,  H01L21/336 ,  H01L29/66 ,  H01L21/8252 ,  H01L27/06 ,  H01L29/808 ,  H01L29/10 ,  H01L29/20

CPC分类号： H01L29/66909 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66924 ,  H01L29/8083

摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region.

摘要翻译： 垂直III族氮化物场效应晶体管包括：包含第一III族氮化物材料的漏极，与漏极电耦合的漏极接触点，以及包括耦合到漏极的第二III族氮化物材料的漂移区域。 场效应晶体管还包括沟道区，该沟道区包括耦合到漏极并沿着垂直方向邻近漏极设置的第三III族氮化物材料，至少部分围绕沟道区的栅极区，具有耦合到漂移的第一表面 区域和与栅极区域相对的栅极区域的一侧上的第二表面，以及电连接到栅极区域的栅极接触。 场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。 沟道区域沿着垂直方向设置在漏极和源极之间，使得在垂直III族氮化物场效应晶体管的操作期间的电流沿着垂直方向，并且沟道区域沿着第二表面的至少一部分延伸 的门区域。

公开(公告)号：US08846482B2

公开(公告)日：2014-09-30

申请号：US13240877

申请日：2011-09-22

申请人： David P. Bour ,  Richard J. Brown ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Linda Romano ,  Andrew P. Edwards ,  Hui Nie ,  Mahdan Raj

发明人： David P. Bour ,  Richard J. Brown ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Linda Romano ,  Andrew P. Edwards ,  Hui Nie ,  Mahdan Raj

IPC分类号： H01L21/8222 ,  H01L21/322 ,  H01L29/778 ,  H01L21/338 ,  H01L21/225 ,  H01L29/66 ,  H01L29/20 ,  H01L29/861 ,  H01L29/207 ,  H01L21/265 ,  H01L29/808 ,  H01L29/872

CPC分类号： H01L21/26546 ,  H01L21/0332 ,  H01L21/2258 ,  H01L21/266 ,  H01L21/3245 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer.

摘要翻译： 在III族氮化物衬底中形成掺杂区域的方法包括提供III族氮化物衬底并形成具有预定图案并与III族氮化物衬底的一部分耦合的掩模层。 III族氮化物衬底的特征在于第一导电类型，并且预定图案限定III族氮化物衬底的暴露区域。 该方法还包括将III族氮化物衬底加热到​​预定温度，并将双前体气体放置在III族氮化物衬底的暴露区域附近。 双前体气体包括氮源和掺杂剂源。 该方法还包括将预定温度保持预定时间段，形成与III族氮化物衬底的暴露区域相邻的p型III族氮化物区域，以及去除掩模层。

公开(公告)号：US08749015B2

公开(公告)日：2014-06-10

申请号：US13299254

申请日：2011-11-17

申请人： Donald R. Disney ,  Andrew P. Edwards ,  Hui Nie ,  Richard J. Brown ,  Isik C. Kizilyalli ,  David P. Bour ,  Linda Romano ,  Thomas R. Prunty

发明人： Donald R. Disney ,  Andrew P. Edwards ,  Hui Nie ,  Richard J. Brown ,  Isik C. Kizilyalli ,  David P. Bour ,  Linda Romano ,  Thomas R. Prunty

IPC分类号： H01L29/06

CPC分类号： H01L21/761 ,  H01L21/2654 ,  H01L21/266 ,  H01L21/765 ,  H01L29/0619 ,  H01L29/0642 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66136 ,  H01L29/66212 ,  H01L29/6631 ,  H01L29/66909 ,  H01L29/8083 ,  H01L29/872

摘要： A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer.

摘要翻译： 一种用于制造边缘终端结构的方法包括提供具有第一表面和第二表面和第一导电类型的衬底，形成耦合到衬底的第一表面的第一导电类型的第一GaN外延层，并形成第二 与第一导电类型相反的第二导电类型的GaN外延层。 第二GaN外延层耦合到第一GaN外延层。 该方法还包括将离子注入第二GaN外延层的第一区域以将第二GaN外延层的第二区域与第二GaN外延层的第三区域电隔离。 该方法还包括形成耦合到第二GaN外延层的第二区域并形成耦合到第二GaN外延层的第三区域的边缘端接结构的有源器件。

公开(公告)号：US20130112985A1

公开(公告)日：2013-05-09

申请号：US13289219

申请日：2011-11-04

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L29/66909 ,  H01L21/823487 ,  H01L27/0605 ,  H01L27/0611 ,  H01L27/0629 ,  H01L27/0727 ,  H01L27/098 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/8083 ,  H01L29/872

摘要： An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.