Dual tunable direct digital synthesizer with a frequency programmable
clock and method of tuning
    1.
    发明授权
    Dual tunable direct digital synthesizer with a frequency programmable clock and method of tuning 失效
    具有频率可编程时钟和调谐方式的双可调直接数字合成器

    公开(公告)号:US5898325A

    公开(公告)日:1999-04-27

    申请号:US895717

    申请日:1997-07-17

    IPC分类号: H03B21/00 H03L7/18

    CPC分类号: H03B21/00 G06F1/0328

    摘要: A dual-tunable direct digital synthesizer is provided with a programmable frequency multiplier that multiplies a relatively low frequency fixed clock signal F.sub.clk so that the output frequency F.sub.o of the waveform is:F.sub.o =(F.sub.n /2.sup.N).times.(M.times.F.sub.clk)where N is the resolution of the digital control word, the tuning word F.sub.n is the value of the N-bit control word, M is the multiplication factor and M*F.sub.clk is the DDS clock frequency. The multiplication factor and, hence, the DDS clock can be reduced to track changes in the output frequency thereby lowering the average power consumption. Because the synthesizer can generate the same output frequency using different tuning word-to-DDS clock ratios, it can be tuned for optimum SFDR over a narrow band around the desired output frequency. In other words, an "enhanced dynamic range band" in the harmonic and spurious performance can be mapped out for each frequency in the bandwidth.

    摘要翻译: 双调谐直接数字合成器具有可编程倍频器,其将相对低频的固定时钟信号Fclk相乘,使得波形的输出频率Fo为:Fo =(Fn / 2N)×(MxFclk)其中N为 数字控制字的分辨率,调谐字Fn是N位控制字的值,M是乘法因子,M * Fclk是DDS时钟频率。 因此,可以减少乘法因子和DDS时钟以跟踪输出频率的变化,从而降低平均功耗。 由于合成器可以使用不同的调谐字DDS时钟比产生相同的输出频率,因此可以针对所需输出频率周围的窄带调节最佳SFDR。 换句话说,可以为带宽中的每个频率映射谐波和杂散性能中的“增强型动态范围带”。

    High speed active overvoltage detection and protection for overvoltage
sensitive circuits
    2.
    发明授权
    High speed active overvoltage detection and protection for overvoltage sensitive circuits 失效
    用于过电压敏感电路的高速有源过压检测和保护

    公开(公告)号:US5479119A

    公开(公告)日:1995-12-26

    申请号:US344452

    申请日:1994-11-23

    CPC分类号: H03G11/00 H03F1/52

    摘要: An overvoltage protection circuit protects against saturation and damage of sensitive circuitry elements. The protection circuit includes an out-of-range detector which compares an input signal to reference levels to determine if it is within a predetermined range of acceptable inputs. If the input is determined not to be within this range, a control circuit substitutes a supplemental signal within the range for the input signal. Digital correction can be provided to correct the output of the sensitive circuit element while the supplemental signal is being substituted. Numerous circuit designs may be used to implement the protection scheme.

    摘要翻译: 过压保护电路可以防止敏感电路元件的饱和和损坏。 保护电路包括超出范围检测器,其将输入信号与参考电平进行比较,以确定其是否在可接受输入的预定范围内。 如果确定输入不在该范围内,则控制电路将输入信号范围内的补充信号代入。 可以提供数字校正以在补充信号被替代时校正敏感电路元件的输出。 可以使用许多电路设计来实现保护方案。

    High speed saturation prevention for saturable circuit elements
    3.
    发明授权
    High speed saturation prevention for saturable circuit elements 失效
    可饱和电路元件的高速饱和度预防

    公开(公告)号:US5661422A

    公开(公告)日:1997-08-26

    申请号:US571243

    申请日:1995-12-12

    IPC分类号: H03M1/12 H03M1/14 H03K5/153

    CPC分类号: H03M1/129 H03M1/145

    摘要: A protection circuit inhibits saturation and damage of sensitive circuit elements when an input signal goes out of a nominal input range. The protection circuit includes an out-of-range detector which compares the input signal to reference levels to determine if it is within the range. If it is not, a control circuit substitutes a supplemental signal that is slightly out of range, but not so far out of range as to cause any substantial saturation. Supplemental signal sources that produce supplemental signals slightly outside the high and low ends of the range with error margins, not more than about 750 mV, that lie just outside the range; an out-of-range input is replaced by the supplemental signal with the closest value. The invention is particularly applicable to multistep/subranging analog-to-digital/converters.

    摘要翻译: 当输入信号超出标称输入范围时,保护电路可以抑制敏感电路元件的饱和和损坏。 保护电路包括超出范围的检测器,其将输入信号与参考电平进行比较,以确定其是否在该范围内。 如果不是这样,则控制电路将稍微超出范围的补充信号代替,但是不能超出范围,导致任何显着的饱和。 补充信号源产生稍微超出范围的高端和低端的补充信号,误差范围不大于约750mV,处于范围之外; 超范围输入由具有最接近的值的补充信号代替。 本发明特别适用于模数转换器的多级/次级化。

    Differential amplifiers which can form a residue amplifier in
sub-ranging A/D converters
    4.
    发明授权
    Differential amplifiers which can form a residue amplifier in sub-ranging A/D converters 失效
    差分放大器可在子范围A / D转换器中形成残留放大器

    公开(公告)号:US5530444A

    公开(公告)日:1996-06-25

    申请号:US368862

    申请日:1995-01-05

    摘要: Open-loop differential amplifiers (120, 140) are disclosed which have accurate and stable gain. The gain of these amplifiers is substantially insensitive to the effects of small-signal emitter resistance r.sub.e, current gain .beta. and Early voltage V.sub.A. Thus, their gain can be accurately set by resistance ratios which makes them particularly useful in integrated circuits. These advantages are obtained with an output differential pair (67) that has cross-coupled base and collector terminals. In addition, resistors (141, 143, 148, 150) and a current source (146) associated with this differential pair are related to like elements (27, 28, 24, 25 and 26) that are associated with an input differential pair (21) by disclosed numerical ratios, e.g., the nominal gain G of the amplifier. Versions of the amplifiers can be adapted for use as a residue amplifier (162) in a subranging A/D converter (160).

    摘要翻译: 公开了具有准确和稳定增益的开环差分放大器(120,140)。 这些放大器的增益对小信号发射极电阻re,电流增益β和早期电压VA的影响基本上不敏感。 因此,它们的增益可以通过电阻比来精确地设定,这使得它们在集成电路中特别有用。 这些优点通过具有交叉耦合基极和集电极端子的输出差分对(67)获得。 另外,与该差分对相关联的电阻(141,143,148,150)和电流源(146)与与输入差分对相关联的相似元件(27,28,24,25和26)有关 21)通过公开的数值比例,例如放大器的标称增益G。 放大器的版本可以适用于在亚排A / D转换器(160)中的残留放大器(162)。

    Feedback systems for enhanced oscillator switching time
    5.
    发明授权
    Feedback systems for enhanced oscillator switching time 有权
    用于增强振荡器切换时间的反馈系统

    公开(公告)号:US06549079B1

    公开(公告)日:2003-04-15

    申请号:US10008433

    申请日:2001-11-09

    申请人: David T. Crook

    发明人: David T. Crook

    IPC分类号: H03L700

    摘要: Feedback control loop systems are provided that enhance output-signal switching times without degrading other loop performance parameters. The systems reduce “kick-back” voltages that are generated in a loop filter by drive currents which rapidly drive a control loop oscillator to a loop acquisition range. This reduction reduces a frequency step in the oscillator output signal which would otherwise have to be driven to eliminate the frequency step with a consequent increase in the output-signal switching time. Structures are provided that reduce the kick-back voltage to thereby enhance output-signal switching times.

    摘要翻译: 提供了反馈控制回路系统,可以增强输出信号切换时间,而不会降低其他回路性能参数。 系统通过驱动电流降低在环路滤波器中产生的“反冲”电压,驱动电流将控制环路振荡器快速驱动到回路采集范围。 这种减少减少了振荡器输出信号中的频率步长,否则,必须驱动振荡器输出信号以消除频率步长,从而导致输出信号切换时间的增加。 提供了降低反冲电压从而增强输出信号切换时间的结构。

    Adaptive feedback-loop controllers and methods for rapid switching of oscillator frequencies
    6.
    发明授权
    Adaptive feedback-loop controllers and methods for rapid switching of oscillator frequencies 有权
    自适应反馈回路控制器和快速切换振荡器频率的方法

    公开(公告)号:US06522206B1

    公开(公告)日:2003-02-18

    申请号:US09973281

    申请日:2001-10-09

    IPC分类号: H03L700

    摘要: Feedback methods and systems are provided to achieve rapid switching of oscillator frequencies without compromising operational feedback loop bandwidths that filter out spurious tones and phase noise to thereby enhance loop spectral and noise performance. The methods respond to frequency changes in a reference signal by providing an open-loop drive current to drive a feedback signal towards the reference signal. The drive current is terminated and the feedback control loop closed when the feedback signal is within a predetermined acquisition range of the reference signal. This is determined by successively comparing a feedback frequency of the feedback signal to a destination frequency of the reference signal over a comparison window of time. The invention also provides a feedback control system that practices the invention's methods.

    摘要翻译: 提供反馈方法和系统以实现振荡器频率的快速切换,而不会影响滤除伪噪声和相位噪声的操作反馈环路带宽,从而增强环路频谱和噪声性能。 该方法通过提供开环驱动电流来驱动参考信号的反馈信号来响应参考信号中的频率变化。 当反馈信号在参考信号的预定采集范围内时,驱动电流终止并且反馈控制回路闭合。 这通过在比较时间窗口上连续地比较反馈信号的反馈频率与参考信号的目的地频率来确定。 本发明还提供了实现本发明方法的反馈控制系统。

    Identification of pin-open faults by capacitive coupling through the
integrated circuit package
    7.
    发明授权
    Identification of pin-open faults by capacitive coupling through the integrated circuit package 失效
    通过集成电路封装的电容耦合识别引脚开路故障

    公开(公告)号:US5557209A

    公开(公告)日:1996-09-17

    申请号:US400787

    申请日:1995-03-07

    摘要: Disclosed is a system that determines whether input and output pins of semiconductor components are present and properly soldered to a printed circuit board. The system uses an oscillator which supplies a signal, typically ten kilohertz (10 kHz) at 0.2 volts, to the pin under test. A conductive electrode is placed on top of the component package. The electrode is connected to a current measuring device. Another pin of the component is connected to the common signal return. Typically the other pin is chosen to be a power or ground pin of the component.

    摘要翻译: 公开了一种确定半导体部件的输入和输出引脚是否存在并被适当地焊接到印刷电路板的系统。 该系统使用一个振荡器,该信号通常以0.2伏特的十千赫兹(10 kHz)信号提供给被测试的引脚。 导电电极放置在组件封装的顶部。 电极连接到电流测量装置。 组件的另一个引脚连接到公共信号返回。 通常,另一个引脚被选择为部件的电源或接地引脚。

    ADJUSTMENT OF MEASUREMENT SYSTEM COMPONENTS
    8.
    发明申请
    ADJUSTMENT OF MEASUREMENT SYSTEM COMPONENTS 有权
    测量系统组件的调整

    公开(公告)号:US20130256515A1

    公开(公告)日:2013-10-03

    申请号:US13432939

    申请日:2012-03-28

    IPC分类号: G01J1/42

    摘要: One aspect provides a system including a sensor adjustment component comprising: a memory device having adjustment information stored therein; signal source capable of producing a signal detectable by a sensor to be adjusted; and one or more processors; wherein the one or more processors are configured to execute program instructions to operate the signal source to produce a predetermined signal pattern detectable by a measurement component of the sensor to be adjusted; and wherein the predetermined signal pattern comprises the adjustment information. Other aspects are disclosed.

    摘要翻译: 一个方面提供一种包括传感器调节部件的系统,包括:具有存储在其中的调节信息的存储器装置; 信号源能够产生可由传感器检测的信号进行调节; 和一个或多个处理器; 其中所述一个或多个处理器被配置为执行程序指令以操作所述信号源以产生可由待调整的所述传感器的测量部件检测的预定信号图案; 并且其中所述预定信号图案包括所述调整信息。 公开其他方面。

    Circuit testing system
    10.
    发明授权
    Circuit testing system 失效
    电路测试系统

    公开(公告)号:US5381417A

    公开(公告)日:1995-01-10

    申请号:US8472

    申请日:1993-01-25

    IPC分类号: G01R31/28 G06F15/20

    摘要: The present invention relates to the field of circuit assembly testing systems and provides improved systems and methods for debugging circuit test systems and diagnosing faults in circuit assemblies. An expert system derives possible root causes of test failures, predicts test results based on these possible root causes and uses factual observations to refute inconsistent hypothetical root causes. Tests useful in refuting inconsistent hypothetical root causes are devised and run automatically by the system.

    摘要翻译: 本发明涉及电路组装测试系统领域,并提供用于调试电路测试系统和诊断电路组件中的故障的改进的系统和方法。 专家系统可能导致测试失败的根本原因,根据这些可能的根本原因预测测试结果,并使用事实观察来反驳不一致的假设根本原因。 用于反驳不一致假设根本原因的测试由系统自动设计和运行。