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    High voltage generating circuit and method of operating the same
    5.
    发明授权
    High voltage generating circuit and method of operating the same 有权
    高压发生电路及其运行方法

    公开(公告)号：US08755242B2

    公开(公告)日：2014-06-17

    申请号：US13354454

    申请日：2012-01-20

    申请人： Cheon An Lee ,  Doogon Kim

    发明人： Cheon An Lee ,  Doogon Kim

    IPC分类号： G11C5/14

    CPC分类号： H02M1/15 ,  G11C5/145 ,  H02M3/07 ,  H02M2003/077

    摘要： A high voltage generating circuit includes first and second high voltage pump circuits and an oscillator. The oscillator is configured to output a first clock signal driving the first high voltage pump circuit and a second clock signal driving the second high voltage pump circuit. The oscillator includes a first delay circuit configured to output the second clock signal by delaying the first clock signal by a first delay time. The first delay circuit is configured to adjust the first delay time according to a period of the first clock signal.

    摘要翻译： 高压发生电路包括第一和第二高压泵电路和振荡器。 振荡器被配置为输出驱动第一高压泵电路的第一时钟信号和驱动第二高压泵电路的第二时钟信号。 振荡器包括第一延迟电路，其被配置为通过将第一时钟信号延迟第一延迟时间来输出第二时钟信号。 第一延迟电路被配置为根据第一时钟信号的周期来调整第一延迟时间。

    NONVOLATILE MEMORY DEVICES, MEMORY SYSTEMS AND COMPUTING SYSTEMS
    6.
    发明申请
    NONVOLATILE MEMORY DEVICES, MEMORY SYSTEMS AND COMPUTING SYSTEMS 有权
    非易失性存储器件，存储器系统和计算系统

    公开(公告)号：US20120275234A1

    公开(公告)日：2012-11-01

    申请号：US13545588

    申请日：2012-07-10

    申请人： Ho-Chul Lee ,  Doogon Kim ,  Jinman Han

    发明人： Ho-Chul Lee ,  Doogon Kim ,  Jinman Han

    IPC分类号： G11C16/06

    CPC分类号： G11C16/16 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/14

    摘要： A nonvolatile memory device configured to apply a wordline erase voltage to a plurality of wordlines connected to a plurality of memory cells, apply an erase voltage to a substrate where a memory cell string is formed while applying a specific voltage to at least one ground selection line connected to at least one ground selection transistor, and float the at least one ground selection line when a target voltage of the substrate reaches a target voltage.

    摘要翻译： 非易失性存储器件被配置为向连接到多个存储器单元的多个字线施加字线擦除电压，将擦除电压施加到形成存储单元串的衬底上，同时向至少一个接地选择线施加特定电压 连接到至少一个接地选择晶体管，并且当所述衬底的目标电压达到目标电压时浮置所述至少一个接地选择线。

    Nonvolatile memory devices
    7.
    发明授权
    Nonvolatile memory devices 有权
    非易失性存储器件

    公开(公告)号：US08897089B2

    公开(公告)日：2014-11-25

    申请号：US13323275

    申请日：2011-12-12

    申请人： JinTae Kim ,  Doogon Kim

    发明人： JinTae Kim ,  Doogon Kim

    IPC分类号： G11C16/28 ,  G11C16/30 ,  H01L27/115 ,  H01L29/792 ,  G11C16/04

    CPC分类号： H01L27/11582 ,  G11C16/0483 ,  G11C2216/14 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11578 ,  H01L29/792

    摘要： Nonvolatile memory devices including memory cell arrays with first bit line regions and common source tapping regions which are alternately disposed on a substrate along a direction, a page buffer including second bit line regions aligned with the first bit line regions and page buffer tapping regions aligned with the common source tapping regions, and a plurality of bit lines spaced apart from one another and extending to the second bit line regions from the first bit line regions.

    摘要翻译： 非易失性存储器件包括具有第一位线区域的存储单元阵列和沿着一个方向交替地布置在衬底上的公共源点击区域，包括与第一位线区域对准的第二位线区域的页面缓冲器和与 公共源抽头区域和彼此间隔开并从第一位线区域延伸到第二位线区域的多个位线。

    Nonvolatile memory device, erasing method thereof, and memory system including the same
    8.
    发明授权
    Nonvolatile memory device, erasing method thereof, and memory system including the same 有权
    非易失性存储器件，其擦除方法和包括该非易失性存储器件的存储器系统

    公开(公告)号：US08848456B2

    公开(公告)日：2014-09-30

    申请号：US13967455

    申请日：2013-08-15

    申请人： Jinman Han ,  Doogon Kim

    发明人： Jinman Han ,  Doogon Kim

    IPC分类号： G11C11/34 ,  G11C16/16 ,  G11C16/08 ,  G11C16/14 ,  G11C16/04

    CPC分类号： G11C16/14 ,  G11C16/04 ,  G11C16/08 ,  G11C16/16 ,  H01L27/1157 ,  H01L27/11582

    摘要： Provided is an erasing method of a nonvolatile memory device. The erasing method applies a word line erase voltage to a plurality of word lines connected to the memory cells respectively, applies a specific voltage to a ground selection line connected to the ground selection transistor, applies an erase voltage to a substrate in which the memory string formed during the step applying the specific voltage to the ground selection line, and floats the ground selection line in response to a voltage change of the substrate.

    摘要翻译： 提供了一种非易失性存储器件的擦除方法。 擦除方法将字线擦除电压分别施加到连接到存储器单元的多个字线，向连接到接地选择晶体管的接地选择线施加特定电压，将擦除电压施加到其中存储器串 在施加特定电压到地选择线的步骤期间形成，并且响应于衬底的电压变化漂浮地选择线。

    Nonvolatile memory device, programming method thereof and memory system including the same
    9.
    发明授权
    Nonvolatile memory device, programming method thereof and memory system including the same 有权

    公开(公告)号：US08570805B2

    公开(公告)日：2013-10-29

    申请号：US13029518

    申请日：2011-02-17

    申请人： Changhyun Lee ,  Jinman Han ,  Doogon Kim ,  Sunghoi Hur ,  Jongin Yun

    发明人： Changhyun Lee ,  Jinman Han ,  Doogon Kim ,  Sunghoi Hur ,  Jongin Yun

    IPC分类号： G11C16/04

    CPC分类号： G11C16/107 ,  G11C16/0483 ,  G11C16/10 ,  G11C2213/71 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7926

    摘要： Provided is a programming method of a nonvolatile memory device. The nonvolatile memory device includes a substrate and a plurality of memory cells which are stacked in the direction perpendicular to the substrate. The programming method applies a first voltage to a selected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be programmed, applies a second voltage to an unselected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be program-prohibited, applies a third voltage to a selected string selection line connected to at least two memory strings in same row, applies a fourth voltage to an unselected string selection line connected to at least two memory strings in same row, and applies a program operation voltage to a plurality of word lines, each word line connected to each corresponding memory cell in the memory string, wherein the first to third voltages are positive voltages.

    Nonvolatile Memory Device, Programming Method Thereof And Memory System Including The Same
    10.
    发明申请
    Nonvolatile Memory Device, Programming Method Thereof And Memory System Including The Same 有权
    非易失性存储器件，其编程方法和包括其的存储器系统

    公开(公告)号：US20110199829A1

    公开(公告)日：2011-08-18

    申请号：US13029518

    申请日：2011-02-17

    申请人： Changhyun Lee ,  Jinman Han ,  Doogon Kim ,  Sunghoi Hur ,  Jongin Yun

    发明人： Changhyun Lee ,  Jinman Han ,  Doogon Kim ,  Sunghoi Hur ,  Jongin Yun

    IPC分类号： G11C16/04 ,  G11C16/10

    CPC分类号： G11C16/107 ,  G11C16/0483 ,  G11C16/10 ,  G11C2213/71 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7926

    摘要： Provided is a programming method of a nonvolatile memory device. The nonvolatile memory device includes a substrate and a plurality of memory cells which are stacked in the direction perpendicular to the substrate. The programming method applies a first voltage to a selected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be programmed, applies a second voltage to an unselected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be program-prohibited, applies a third voltage to a selected string selection line connected to at least two memory strings in same row, applies a fourth voltage to an unselected string selection line connected to at least two memory strings in same row, and applies a program operation voltage to a plurality of word lines, each word line connected to each corresponding memory cell in the memory string, wherein the first to third voltages are positive voltages.

    摘要翻译： 提供了一种非易失性存储器件的编程方法。 非易失性存储器件包括基板和沿垂直于基板的方向堆叠的多个存储单元。 编程方法将第一电压施加到连接到包括要编程的多个存储器单元的存储单元的同一列中的至少两个存储器串的选定位线，将第二电压施加到连接至少两个的未选定位线 包含要被编程禁止的多个存储单元的存储单元的同一列中的存储器串向同一行中连接到至少两个存储器串的所选择的串选择线施加第三电压，将第四电压施加到未选择的串 选择线连接到同一行中的至少两个存储器串，并且将编程操作电压施加到多个字线，每个字线连接到存储器串中的每个对应的存储单元，其中第一至第三电压是正电压。