公开(公告)号：US20110073974A1

公开(公告)日：2011-03-31

申请号：US12880838

申请日：2010-09-13

申请人： Eiji Takano ,  Hideo Numata ,  Kazumasa Tanida

发明人： Eiji Takano ,  Hideo Numata ,  Kazumasa Tanida

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14618 ,  H01L21/78 ,  H01L27/14683 ,  H01L2224/13

摘要： In one embodiment, a method for manufacturing a semiconductor device includes following steps. An aperture is formed in an interlayer insulating film formed on a semiconductor wafer apart from an integrated circuit portion by etching process. The interlayer insulating film has a dielectric constant smaller than a silicon oxide film (SiO2), and the width of the aperture is larger than a dicing region. A resin layer is embedded in the aperture. An adhesive layer is formed on the interlayer insulating film and the resin layer. The semiconductor wafer is attached to a glass substrate using the adhesive layer by Face Down method. The semiconductor wafer, the resin layer, and the adhesive layer on a dicing region are cut by blade dicing. The semiconductor wafer and the glass substrate adhered to the semiconductor wafer are cut into pieces by the blade dicing of the glass substrate under the dicing region.

摘要翻译： 在一个实施例中，制造半导体器件的方法包括以下步骤。 在通过蚀刻工艺与集成电路部分隔开的半导体晶片上形成的层间绝缘膜中形成开口。 层间绝缘膜的介电常数小于氧化硅膜（SiO 2），并且孔径的宽度大于切割区域。 树脂层嵌入孔中。 在层间绝缘膜和树脂层上形成粘接层。 半导体晶片通过Face Down方法使用粘合剂层附着到玻璃基板上。 通过刀片切割切割切割区域上的半导体晶片，树脂层和粘合剂层。 通过在切割区域下方的玻璃基板的切片将切割半导体晶片和粘附到半导体晶片的玻璃基板切割成片。

公开(公告)号：US08704337B2

公开(公告)日：2014-04-22

申请号：US12880838

申请日：2010-09-13

申请人： Eiji Takano ,  Hideo Numata ,  Kazumasa Tanida

发明人： Eiji Takano ,  Hideo Numata ,  Kazumasa Tanida

IPC分类号： H01L23/00 ,  H01L31/0232

CPC分类号： H01L27/14618 ,  H01L21/78 ,  H01L27/14683 ,  H01L2224/13

摘要： In one embodiment, a method for manufacturing a semiconductor device includes following steps. An aperture is formed in an interlayer insulating film formed on a semiconductor wafer apart from an integrated circuit portion by etching process. The interlayer insulating film has a dielectric constant smaller than a silicon oxide film (SiO2), and the width of the aperture is larger than a dicing region. A resin layer is embedded in the aperture. An adhesive layer is formed on the interlayer insulating film and the resin layer. The semiconductor wafer is attached to a glass substrate using the adhesive layer by Face Down method. The semiconductor wafer, the resin layer, and the adhesive layer on a dicing region are cut by blade dicing. The semiconductor wafer and the glass substrate adhered to the semiconductor wafer are cut into pieces by the blade dicing of the glass substrate under the dicing region.

摘要翻译： 在一个实施例中，制造半导体器件的方法包括以下步骤。 在通过蚀刻工艺与集成电路部分隔开的半导体晶片上形成的层间绝缘膜中形成开口。 层间绝缘膜的介电常数小于氧化硅膜（SiO 2），并且孔径的宽度大于切割区域。 树脂层嵌入孔中。 在层间绝缘膜和树脂层上形成粘接层。 半导体晶片通过Face Down方法使用粘合剂层附着到玻璃基板上。 通过刀片切割切割切割区域上的半导体晶片，树脂层和粘合剂层。 通过在切割区域下方的玻璃基板的切片将切割半导体晶片和粘附到半导体晶片的玻璃基板切割成片。

公开(公告)号：US20100213564A1

公开(公告)日：2010-08-26

申请号：US12556613

申请日：2009-09-10

申请人： Kazumasa Tanida ,  Hideo Numata ,  Eiji Takano

发明人： Kazumasa Tanida ,  Hideo Numata ,  Eiji Takano

IPC分类号： H01L31/0216 ,  H01L31/18

CPC分类号： H01L27/14683 ,  H01L24/13 ,  H01L24/32 ,  H01L27/14618 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05686 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/01074 ,  H01L2924/01023 ,  H01L2924/04953 ,  H01L2924/01026 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A sensor chip includes: a semiconductor substrate that is provided with a light receiving portion on a main surface; a light transmissive member that is provided on the main surface of the semiconductor substrate, enclosing a hollow portion above the light receiving portion, to surround upper and periphery of the light receiving portion; and a light transmissive protective member that is provided on the light transmissive member.

摘要翻译： 传感器芯片包括：在主表面上设置有光接收部分的半导体衬底; 设置在半导体衬底的主表面上的光透射构件，其包围光接收部分上方的中空部分，以围绕光接收部分的上部和外围; 以及设置在透光构件上的透光保护构件。

公开(公告)号：US08980671B2

公开(公告)日：2015-03-17

申请号：US13368930

申请日：2012-02-08

申请人： Satoshi Hongo ,  Kazumasa Tanida ,  Akihiro Hori ,  Kenji Takahashi ,  Hideo Numata

发明人： Satoshi Hongo ,  Kazumasa Tanida ,  Akihiro Hori ,  Kenji Takahashi ,  Hideo Numata

IPC分类号： H01L21/00 ,  H01L21/30 ,  H01L21/46 ,  H01L27/146 ,  H01L21/84 ,  H01L27/12

CPC分类号： H01L27/1464 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/1469

摘要： A manufacturing method of a semiconductor device according to embodiments includes forming a photodiode layer, which is an active region including a photodiode, on a main surface of a first substrate, forming a wiring layer, which includes a wire and a dielectric layer covering the wire, on the photodiode layer, and forming a dielectric film on the wiring layer. The manufacturing method of the semiconductor device according to the embodiments further includes bonding a second substrate to the dielectric film of the first substrate so that a crystal orientation of the photodiode layer matches a crystal orientation of the second substrate.

摘要翻译： 根据实施例的半导体器件的制造方法包括在第一衬底的主表面上形成作为包括光电二极管的有源区的光电二极管层，形成布线层，其包括线和覆盖线的介电层 在光电二极管层上，并在布线层上形成电介质膜。 根据实施例的半导体器件的制造方法还包括将第二衬底接合到第一衬底的电介质膜，使得光电二极管层的晶体取向与第二衬底的晶体取向相匹配。

公开(公告)号：US08822307B2

公开(公告)日：2014-09-02

申请号：US13422966

申请日：2012-03-16

申请人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

发明人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

IPC分类号： H01L21/762 ,  B32B37/10 ,  B32B38/18 ,  H01L21/67

CPC分类号： H01L21/76251 ,  H01L21/67092 ,  Y10T156/1744

摘要： According to one embodiment, a semiconductor manufacturing apparatus is provided. The semiconductor manufacturing apparatus includes a stage, a substrate supporter, first and second pushers, and a controller. The stage is configured to support outer periphery portions of the first semiconductor substrate from below. The substrate supporter is configured to hold the back of the second semiconductor substrate. The first and second pushers are configured to bring the first and second semiconductor substrates in contact. The controller is configured to form the bonding initiation point between the first and second semiconductor substrates.

摘要翻译： 根据一个实施例，提供一种半导体制造装置。 半导体制造装置包括台，基板支撑件，第一和第二推动器以及控制器。 该台被配置为从下方支撑第一半导体衬底的外围部分。 衬底支撑件构造成保持第二半导体衬底的背面。 第一和第二推动器构造成使第一和第二半导体衬底接触。 控制器被配置为在第一和第二半导体衬底之间形成接合起始点。

公开(公告)号：US08748316B2

公开(公告)日：2014-06-10

申请号：US13169548

申请日：2011-06-27

申请人： Takashi Shirono ,  Mie Matsuo ,  Hideo Numata ,  Kazumasa Tanida ,  Tsuyoshi Matsumura

发明人： Takashi Shirono ,  Mie Matsuo ,  Hideo Numata ,  Kazumasa Tanida ,  Tsuyoshi Matsumura

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L27/14683 ,  H01L27/14625 ,  H01L27/14632 ,  H01L27/1464

摘要： According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

摘要翻译： 根据实施例，制造半导体器件的方法包括在半导体衬底的包括通过抛光暴露的表面的表面上抛光半导体衬底的周边部分并形成作为绝缘膜的保护膜。

公开(公告)号：US20120329241A1

公开(公告)日：2012-12-27

申请号：US13422966

申请日：2012-03-16

申请人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

发明人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

IPC分类号： B32B37/10 ,  B32B38/18 ,  H01L21/762

CPC分类号： H01L21/76251 ,  H01L21/67092 ,  Y10T156/1744

摘要： According to one embodiment, a semiconductor manufacturing apparatus is provided. The semiconductor manufacturing apparatus includes a stage, a substrate supporter, first and second pushers, and a controller. The stage is configured to support outer periphery portions of the first semiconductor substrate from below. The substrate supporter is configured to hold the back of the second semiconductor substrate. The first and second pushers are configured to bring the first and second semiconductor substrates in contact. The controller is configured to form the bonding initiation point between the first and second semiconductor substrates.

摘要翻译： 根据一个实施例，提供一种半导体制造装置。 半导体制造装置包括台，基板支撑件，第一和第二推动器以及控制器。 该台被配置为从下方支撑第一半导体衬底的外围部分。 衬底支撑件构造成保持第二半导体衬底的背面。 第一和第二推动器构造成使第一和第二半导体衬底接触。 控制器被配置为在第一和第二半导体衬底之间形成接合起始点。

公开(公告)号：US08309430B2

公开(公告)日：2012-11-13

申请号：US13035182

申请日：2011-02-25

申请人： Kazumasa Tanida ,  Naoko Yamaguchi ,  Satoshi Hongo ,  Chiaki Takubo ,  Hideo Numata

发明人： Kazumasa Tanida ,  Naoko Yamaguchi ,  Satoshi Hongo ,  Chiaki Takubo ,  Hideo Numata

IPC分类号： H01L21/30 ,  B32B37/00 ,  B32B41/00

CPC分类号： B23P19/00 ,  Y10T29/5313 ,  Y10T156/10 ,  Y10T156/1744

摘要： According to one embodiment, a first substrate and a second substrate are pressed from an opposite surface of a joint surface of the second substrate such that a joint surface of the first substrate and the joint surface of the second substrate are in contact with each other. The second substrate is restrained by a member to provide a gap between the joint surfaces. It is determined, based on a temporal change of a joint interface calculated based on an image imaged from the opposite surface side of the joint surface, whether joining is normally performed.

摘要翻译： 根据一个实施例，第一基板和第二基板从第二基板的接合表面的相对表面被按压，使得第一基板的接合表面和第二基板的接合表面彼此接触。 第二基板被构件约束以在接合表面之间提供间隙。 基于基于从接合面的相对面侧成像的图像计算的接合界面的时间变化，确定是否正常进行接合。

公开(公告)号：US08778778B2

公开(公告)日：2014-07-15

申请号：US13212644

申请日：2011-08-18

申请人： Kazumasa Tanida ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Tsuyoshi Matsumura ,  Hideo Numata ,  Mari Otsuka ,  Naoko Yamaguchi ,  Takashi Shirono ,  Satoshi Hongo

发明人： Kazumasa Tanida ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Tsuyoshi Matsumura ,  Hideo Numata ,  Mari Otsuka ,  Naoko Yamaguchi ,  Takashi Shirono ,  Satoshi Hongo

IPC分类号： H01L21/77

CPC分类号： H01L27/1464 ,  H01L27/14618 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14683 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

摘要： According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.

摘要翻译： 根据实施例，在半导体衬底的第一表面上形成有源层，在有源层上形成布线层，并且覆盖布线层形成绝缘层。 半导体衬底的第一表面经由绝缘层接合到支撑衬底，并且结合到支撑衬底的半导体衬底被薄化，从第二表面离开具有预定厚度的半导体衬底覆盖有源层。 去除减薄的半导体衬底的面积的至少一部分以暴露活性层。

公开(公告)号：US20120217600A1

公开(公告)日：2012-08-30

申请号：US13368930

申请日：2012-02-08

申请人： Satoshi HONGO ,  Kazumasa Tanida ,  Akihiro Hori ,  Kenji Takahashi ,  Hideo Numata

发明人： Satoshi HONGO ,  Kazumasa Tanida ,  Akihiro Hori ,  Kenji Takahashi ,  Hideo Numata

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/1464 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/1469

摘要： A manufacturing method of a semiconductor device according to embodiments includes forming a photodiode layer, which is an active region including a photodiode, on a main surface of a first substrate, forming a wiring layer, which includes a wire and a dielectric layer covering the wire, on the photodiode layer, and forming a dielectric film on the wiring layer. The manufacturing method of the semiconductor device according to the embodiments further includes bonding a second substrate to the dielectric film of the first substrate so that a crystal orientation of the photodiode layer matches a crystal orientation of the second substrate.

摘要翻译： 根据实施例的半导体器件的制造方法包括在第一衬底的主表面上形成作为包括光电二极管的有源区的光电二极管层，形成布线层，其包括线和覆盖线的介电层 在光电二极管层上，并在布线层上形成电介质膜。 根据实施例的半导体器件的制造方法还包括将第二衬底接合到第一衬底的电介质膜，使得光电二极管层的晶体取向与第二衬底的晶体取向相匹配。