公开(公告)号：US11916140B2

公开(公告)日：2024-02-27

申请号：US17508933

申请日：2021-10-22

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sungjae Chang ,  Hokyun Ahn ,  Hyunwook Jung

IPC: H01L29/778 ,  H01L29/78

CPC classification number: H01L29/7786 ,  H01L29/7827 ,  H01L29/785

Abstract: Provided is a compound semiconductor device. The compound semiconductor device according to embodiments of the inventive concept includes a first semiconductor layer having a fin extending in a first direction on a substrate, an upper gate electrode extending in a second direction perpendicular to the first direction on the first semiconductor layer, a second semiconductor layer disposed between a sidewall of the fin and the upper gate electrode, a dielectric layer disposed between a top surface of the fin and the upper gate electrode, and a lower gate structure connected to a bottom surface of the first semiconductor layer by passing through the substrate.

公开(公告)号：US10608102B2

公开(公告)日：2020-03-31

申请号：US16137235

申请日：2018-09-20

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Hokyun Ahn ,  Min Jeong Shin ,  Jeong Jin Kim ,  Hae Cheon Kim ,  Jae Won Do ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hyung Seok Lee ,  Jong-Won Lim ,  Sungjae Chang ,  Hyunwook Jung ,  Kyu Jun Cho ,  Dong Min Kang ,  Dong-Young Kim ,  Seong-Il Kim ,  Sang-Heung Lee ,  Jongmin Lee ,  Hong Gu Ji

IPC: H01L29/78 ,  H01L29/45 ,  H01L29/778 ,  H01L29/66 ,  H01L21/3065 ,  H01L29/417 ,  H01L29/06 ,  H01L29/20 ,  H01L29/423

Abstract: Provided is a semiconductor device including a substrate in which an insulation layer is disposed between a first semiconductor layer and a second semiconductor layer, a through-hole penetrating through the substrate, the through-hole having a first hole penetrating through the first semiconductor layer and a second hole penetrating through the insulation layer and the second semiconductor layer from a bottom surface of the first hole, an epi-layer disposed inside the through-hole, a drain electrode disposed inside the second hole and contacting one surface of the epi-layer, and a source electrode and a gate electrode which are disposed on the other surface of the epi-layer.

公开(公告)号：US10256811B2

公开(公告)日：2019-04-09

申请号：US15654792

申请日：2017-07-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Woojin Chang ,  Jong-Won Lim ,  Dong Min Kang ,  Dong-Young Kim ,  Seong-il Kim ,  Hae Cheon Kim ,  Jae Won Do ,  Byoung-Gue Min ,  Min Jeong Shin ,  Hokyun Ahn ,  Hyung Sup Yoon ,  Sang-Heung Lee ,  Jongmin Lee ,  Sungjae Chang ,  Yoo Jin Jang ,  Hyunwook Jung ,  Kyu Jun Cho ,  Hong Gu Ji

IPC: H03K17/687 ,  H03K17/693 ,  G11C5/14 ,  H03K19/0175 ,  H03K3/353 ,  H03K17/0812 ,  H03K17/10 ,  H03K17/12 ,  H03K17/14 ,  H03K17/16 ,  H03K17/28

Abstract: Provided is a cascode circuit including first and second transistors connected between a drain terminal and a source terminal in cascode form, a level sifter configured to change a voltage level of a switching control signal applied to a gate terminal and provide the changed switching control signal to a gate of the first transistor, a buffer configured to delay the switching control signal and provide the delayed switching control signal to a gate of the second transistor, and a first resistor connected between the level shifter and the gate of the first transistor.