公开(公告)号：US20070035027A1

公开(公告)日：2007-02-15

申请号：US11471236

申请日：2006-06-20

申请人： Fernando Gonzalez ,  Gurtej Sandhu ,  Mike Violette

发明人： Fernando Gonzalez ,  Gurtej Sandhu ,  Mike Violette

IPC分类号： H01L23/52

CPC分类号： H01L21/76804 ,  H01L21/28518 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/10 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675 ,  H01L45/1683

摘要： A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby creating a double metal scheme wherein the strapping layer is a second metal layer overlying metal wordlines. In a method of a first embodiment the strapping material is electrically connected to the digit line through a planar landing pad overlying the conductive plug. An insulative material is sloped to the planar landing pad in order to provide a surface conducive to the formation of the strapping material. In a method of a second embodiment diodes are formed, each having a maximum width equal to f, which is equal to the minimum photolithographic limit of the photolithographic equipment being used, and distanced one from the other along a length of the digit line by a maximum distance equal to f, at least portions of the diodes are masked; at least a portion of an insulative material interposed between two diodes is removed to expose the buried digit line; and the conductive plug is formed in contact with the exposed portion of the buried digit line. After the formation of a programmable resistor in series with the diode a wordline is formed in electrical communication with each of the programmable resistors, and an insulative layer is formed overlying each wordline. Next an insulative spacer layer is deposited and etched to expose the conductive plug. The strapping layer is then formed overlying and in contact with the conductive plug.

摘要翻译： 一种存储器件，其中二极管串联连接到可编程电阻并与埋地数字线电连通。 导电插头电插入数字线和捆扎层之间，从而产生双金属方案，其中捆扎层是覆盖金属字线的第二金属层。 在第一实施例的方法中，捆扎材料通过覆盖在导电插塞上的平面着陆垫电连接到数字线。 绝缘材料倾斜到平面着陆垫，以提供有利于形成捆扎材料的表面。 在第二实施例的方法中，形成二极管，每个二极管具有等于f的最大宽度，其等于所使用的光刻设备的最小光刻极限，并且沿着数字线的长度彼此间隔一个 最大距离等于f，至少部分二极管被遮蔽; 插入在两个二极管之间的绝缘材料的至少一部分被去除以露出掩埋的数字线; 并且导电插塞形成为与掩埋的数字线的暴露部分接触。 在与二极管串联形成可编程电阻器之后，形成与每个可编程电阻器电连通的字线，并且在每个字线上形成绝缘层。 接下来，沉积和蚀刻绝缘间隔层以暴露导电插塞。 然后将捆扎层覆盖并与导电塞接触。

公开(公告)号：US07773492B2

公开(公告)日：2010-08-10

申请号：US11405637

申请日：2006-04-18

申请人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

发明人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

IPC分类号： G11B9/00

CPC分类号： G11B9/04

摘要： A data storage device and methods for storing and reading data are provided. The data storage device includes a data storage medium and second device. The data storage medium has an insulating layer, a first electrode layer over the insulating layer and at least one layer of resistance variable material over the first electrode layer. The second device includes a substrate and at least one conductive point configured to electrically contact the data storage medium.

摘要翻译： 提供了一种用于存储和读取数据的数据存储装置和方法。 数据存储装置包括数据存储介质和第二装置。 数据存储介质具有绝缘层，绝缘层上的第一电极层和第一电极层上的至少一层电阻可变材料。 第二装置包括基板和被配置为电接触数据存储介质的至少一个导电点。

公开(公告)号：US08189450B2

公开(公告)日：2012-05-29

申请号：US12837984

申请日：2010-07-16

申请人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

发明人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

IPC分类号： B11B9/00

CPC分类号： G11B9/04

摘要： A data storage device and methods for storing and reading data are provided. The data storage device includes a data storage medium and second device. The data storage medium has an insulating layer, a first electrode layer over the insulating layer and at least one layer of resistance variable material over the first electrode layer. The second device includes a substrate and at least one conductive point configured to electrically contact the data storage medium.

摘要翻译： 提供了一种用于存储和读取数据的数据存储装置和方法。 数据存储装置包括数据存储介质和第二装置。 数据存储介质具有绝缘层，绝缘层上的第一电极层和第一电极层上的至少一层电阻可变材料。 第二装置包括基板和被配置为电接触数据存储介质的至少一个导电点。

公开(公告)号：US20110149637A1

公开(公告)日：2011-06-23

申请号：US12837984

申请日：2010-07-16

申请人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

发明人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

IPC分类号： G11C11/21 ,  H01L45/00 ,  B82Y10/00

CPC分类号： G11B9/04

摘要： A data storage device and methods for storing and reading data are provided. The data storage device includes a data storage medium and second device. The data storage medium has an insulating layer, a first electrode layer over the insulating layer and at least one layer of resistance variable material over the first electrode layer. The second device includes a substrate and at least one conductive point configured to electrically contact the data storage medium.

摘要翻译： 提供了一种用于存储和读取数据的数据存储装置和方法。 数据存储装置包括数据存储介质和第二装置。 数据存储介质具有绝缘层，绝缘层上的第一电极层和第一电极层上的至少一层电阻可变材料。 第二装置包括基板和被配置为电接触数据存储介质的至少一个导电点。

公开(公告)号：US20070242500A1

公开(公告)日：2007-10-18

申请号：US11405637

申请日：2006-04-18

申请人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

发明人： Jun Liu ,  Mike Violette ,  Gurtej Sandhu

IPC分类号： G11C11/00 ,  G11B9/00 ,  G11B11/00 ,  G11C13/00

CPC分类号： G11B9/04

摘要： A data storage device and methods for storing and reading data are provided. The data storage device includes a data storage medium and second device. The data storage medium has an insulating layer, a first electrode layer over the insulating layer and at least one layer of resistance variable material over the first electrode layer. The second device includes a substrate and at least one conductive point configured to electrically contact the data storage medium.

摘要翻译： 提供了一种用于存储和读取数据的数据存储装置和方法。 数据存储装置包括数据存储介质和第二装置。 数据存储介质具有绝缘层，绝缘层上的第一电极层和第一电极层上的至少一层电阻可变材料。 第二装置包括基板和被配置为电接触数据存储介质的至少一个导电点。

公开(公告)号：US10515801B2

公开(公告)日：2019-12-24

申请号：US12908206

申请日：2010-10-20

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213

摘要： Self-assembling materials, such as block copolymers, are used as mandrels for pitch multiplication. The copolymers are deposited over a substrate and directed to self-assemble into a desired pattern. One of the blocks forming the block copolymers is selectively removed. The remaining blocks are used as mandrels for pitch multiplication. Spacer material is blanket deposited over the blocks. The spacer material is subjected to a spacer etch to form spacers on sidewalls of the mandrels. The mandrels are selectively removed to leave free-standing spacers. The spacers may be used as pitch-multiplied mask features to define a pattern in an underlying substrate.

公开(公告)号：US09196753B2

公开(公告)日：2015-11-24

申请号：US13089648

申请日：2011-04-19

申请人： D. V. Nirmal Ramaswamy ,  Gurtej Sandhu

发明人： D. V. Nirmal Ramaswamy ,  Gurtej Sandhu

IPC分类号： H01L27/108 ,  H01L29/872 ,  H01L27/28 ,  H01L45/00 ,  H01L27/102 ,  H01L29/885 ,  H01L27/22 ,  H01L27/24 ,  G11C11/56 ,  G11C13/00

CPC分类号： H01L29/872 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2213/71 ,  H01L27/1021 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/285 ,  H01L29/885 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16

摘要： Methods, devices, and systems are provided for a select device that can include a semiconductive stack of at least one semiconductive material formed on a first electrode, where the semiconductive stack can have a thickness of about 700 angstroms (Å) or less. Each of the at least one semiconductive material can have an associated band gap of about 4 electron volts (eV) or less and a second electrode can be formed on the semiconductive stack.

摘要翻译： 为选择装置提供方法，装置和系统，所述选择装置可以包括形成在第一电极上的至少一个半导体材料的半导体叠层，其中半导体叠层可以具有约700埃（或更小）的厚度。 所述至少一个半导体材料中的每一个可以具有约4电子伏（eV）或更小的相关带隙，并且可以在半导体叠层上形成第二电极。

公开(公告)号：US08946907B2

公开(公告)日：2015-02-03

申请号：US13526225

申请日：2012-06-18

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H01L23/52 ,  H01L21/311 ,  H01L21/033

CPC分类号： H01L23/5226 ,  H01L21/0337 ,  H01L21/31144 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for creating structures in a semiconductor assembly is provided. The method includes etching apertures into a dielectric layer and applying a polymer layer over the dielectric layer. The polymer layer is applied uniformly and fills the apertures at different rates depending on the geometry of the apertures, or on the presence or absence of growth accelerating material. The polymer creates spacers for the etching of additional structure in between the spacers. The method is capable of achieving structures smaller than current lithography techniques.

摘要翻译： 提供了一种用于在半导体组件中产生结构的方法。 该方法包括将孔蚀刻到电介质层中，并在该介电层上施加聚合物层。 均匀地施加聚合物层，并根据孔的几何形状，或者存在或不存在生长促进材料，以不同的速率填充孔。 该聚合物产生用于蚀刻间隔物之间​​的附加结构的间隔物。 该方法能够实现比当前光刻技术更小的结构。

公开(公告)号：US08796661B2

公开(公告)日：2014-08-05

申请号：US12917348

申请日：2010-11-01

申请人： Nirmal Ramaswamy ,  Gurtej Sandhu

发明人： Nirmal Ramaswamy ,  Gurtej Sandhu

IPC分类号： H01L47/00 ,  H01L21/06 ,  H01L21/20

CPC分类号： H01L45/085 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/1273 ,  H01L45/14 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1683

摘要： A method of forming a nonvolatile memory cell includes forming a first electrode having a first current conductive material and a circumferentially self-aligned second current conductive material projecting elevationally outward from the first current conductive material. The second current conductive material is different in composition from the first current conductive material. A programmable region is formed over the first current conductive material and over the projecting second current conductive material of the first electrode. A second electrode is formed over the programmable region. In one embodiment, the programmable region is ion conductive material, and at least one of the first and second electrodes has an electrochemically active surface directly against the ion conductive material. Other method and structural aspects are disclosed.

摘要翻译： 形成非易失性存储单元的方法包括形成具有第一电流导电材料的第一电极和从第一电流导电材料向外突出的周向自对准的第二导电材料。 第二电流导电材料的组成不同于第一电流导电材料。 可编程区域形成在第一电流导电材料之上并且在第一电极的突出的第二电流导电材料之上。 在可编程区域上形成第二电极。 在一个实施例中，可编程区域是离子传导材料，并且第一和第二电极中的至少一个电极具有直接抵靠离子导电材料的电化学活性表面。 公开了其它方法和结构方面。

公开(公告)号：US08637113B2

公开(公告)日：2014-01-28

申请号：US13354163

申请日：2012-01-19

申请人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

发明人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

IPC分类号： C23C18/00 ,  C23C20/00 ,  C23C28/00 ,  C23C30/00 ,  H01C17/06

CPC分类号： H01L27/101 ,  H01L21/0271 ,  Y10S438/947

摘要： A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

摘要翻译： 形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。 含金属氧化物的材料形成在多条所述一条字线或位线中。 在多个所述一条字线或位线之间提供一系列细长的沟槽。 多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。 从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。