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    Optoelectronic semiconductor component
    7.
    发明授权
    Optoelectronic semiconductor component 有权
    光电半导体元件

    公开(公告)号：US06618410B1

    公开(公告)日：2003-09-09

    申请号：US09455603

    申请日：1999-12-06

    申请人： Frank Fischer ,  Günter Reuscher ,  Thomas Litz ,  Gottfried Landwehr

    发明人： Frank Fischer ,  Günter Reuscher ,  Thomas Litz ,  Gottfried Landwehr

    IPC分类号： H01S500

    CPC分类号： H01S5/183 ,  H01S5/18305 ,  H01S5/3095

    摘要： An Optoelectronic semiconductor component, in which an active zone is disposed above a semiconductor substrate, and which zone is disposed between at least one first resonator mirror layer and at least one second resonator mirror layer. The first and the second mirror layer each have a semiconductor material of a first conductivity type. At least one first heavily doped junction layer of the first conductivity type and at least one second heavily doped junction layer of a second conductivity type are disposed between the active zone and one of the two mirror layers in such a way that the second heavily doped, degenerate junction layer lies between the active zone and the first heavily doped, degenerate junction layer.

    摘要翻译： 一种光电子半导体部件，其中有源区域设置在半导体衬底上方，并且该区域设置在至少一个第一谐振器镜面层和至少一个第二谐振器镜像层之间。 第一和第二镜层各自具有第一导电类型的半导体材料。 第一导电类型的至少一个第一重掺杂结层和第二导电类型的至少一个第二重掺杂结层被设置在有源区和两个镜层中的一个之间，使得第二重掺杂， 简并结层位于有源区和第一重掺杂的退化结层之间。

    Method for manufacturing a hybrid integrated component
    8.
    发明授权
    Method for manufacturing a hybrid integrated component 有权
    混合集成部件的制造方法

    公开(公告)号：US08941193B2

    公开(公告)日：2015-01-27

    申请号：US13869428

    申请日：2013-04-24

    申请人： Jens Frey ,  Frank Fischer

    发明人： Jens Frey ,  Frank Fischer

    IPC分类号： B81C3/00 ,  B81B1/00 ,  H01L29/84 ,  B81C1/00 ,  B81B7/00

    CPC分类号： B81C1/00269 ,  B81B7/007 ,  B81C1/00238 ,  B81C2203/0785

    摘要： A simple and cost-effective manufacturing method for hybrid integrated components including at least one MEMS element, a cap for the micromechanical structure of the MEMS element, and at least one ASIC substrate, using which a high degree of miniaturization may be achieved. The micromechanical structure of the MEMS element and the cap are manufactured in a layered structure, proceeding from a shared semiconductor substrate, by applying at least one cap layer to a first surface of the semiconductor substrate, and by processing and structuring the semiconductor substrate proceeding from its other second surface, to produce and expose the micromechanical MEMS structure. The semiconductor substrate is then mounted with the MEMS-structured second surface on the ASIC substrate.

    摘要翻译： 一种用于混合集成部件的简单和成本有效的制造方法，包括至少一个MEMS元件，用于MEMS元件的微机械结构的盖，以及至少一个ASIC基板，其可以实现高度的小型化。 MEMS元件和盖的微机械结构通过将至少一个盖层施加到半导体衬底的第一表面，并且通过加工和构造半导体衬底从共享半导体衬底开始，以分层结构制造，并且从 其另一个第二表面，以产生和暴露微机械MEMS结构。 然后将半导体衬底与MEMS结构的第二表面安装在ASIC衬底上。

    Method for manufacturing a cap for a mems component, and hybrid integrated component having such a cap
    9.
    发明申请
    Method for manufacturing a cap for a mems component, and hybrid integrated component having such a cap 有权
    用于制造用于mems组件的盖的方法，以及具有这种盖的混合集成部件

    公开(公告)号：US20140110800A1

    公开(公告)日：2014-04-24

    申请号：US14058806

    申请日：2013-10-21

    申请人： Johannes CLASSEN ,  Axel Franke ,  Jens Frey ,  Heribert Weber ,  Frank Fischer ,  Patrick Wellner

    发明人： Johannes CLASSEN ,  Axel Franke ,  Jens Frey ,  Heribert Weber ,  Frank Fischer ,  Patrick Wellner

    IPC分类号： B81C1/00 ,  B81B3/00

    CPC分类号： B81C1/00015 ,  B81B3/0018 ,  B81B7/0058

    摘要： A manufacturing method for a cap, for a hybrid vertically integrated component having a MEMS component a relatively large cavern volume having a low cavern internal pressure, and a reliable overload protection for the micromechanical structure of the MEMS component. A cap structure is produced in a flat cap substrate in a multistep anisotropic etching, and includes at least one mounting frame having at least one mounting surface and a stop structure, on the cap inner side, having at least one stop surface, the surface of the cap substrate being masked for the multistep anisotropic etching with at least two masking layers made of different materials, and the layouts of the masking layers and the number and duration of the etching steps being selected so that the mounting surface, the stop surface, and the cap inner side are situated at different surface levels of the cap structure.

    摘要翻译： 一种用于具有MEMS部件的混合垂直集成部件的盖的制造方法，具有较低的洞穴内部压力的相对较大的洞穴体积以及用于MEMS部件的微机械结构的可靠的过载保护。 在多步骤各向异性蚀刻中，在平盖基板中制造盖结构，并且包括至少一个安装框架，该安装框架具有至少一个安装表面和止动结构，在盖内侧具有至少一个止动表面， 掩模基板被掩模用于具有由不同材料制成的至少两个掩模层的多步各向异性蚀刻，并且选择掩模层的布局以及蚀刻步骤的数量和持续时间，使得安装表面，止动表面和 帽内侧位于帽结构的不同表面水平处。

    HYBRID INTEGRATED COMPONENT AND METHOD FOR THE MANUFACTURE THEREOF
    10.
    发明申请
    HYBRID INTEGRATED COMPONENT AND METHOD FOR THE MANUFACTURE THEREOF 有权
    混合集成组件及其制造方法

    公开(公告)号：US20130299924A1

    公开(公告)日：2013-11-14

    申请号：US13890450

    申请日：2013-05-09

    申请人： Heribert WEBER ,  Frank Fischer ,  Mirko Hattass ,  Yvonne Bergmann

    发明人： Heribert WEBER ,  Frank Fischer ,  Mirko Hattass ,  Yvonne Bergmann

    IPC分类号： B81B3/00 ,  B81C1/00

    CPC分类号： B81B3/0021 ,  B81B2201/025 ,  B81B2207/096 ,  B81C1/00238 ,  B81C1/00261 ,  B81C1/00301 ,  B81C2203/0792 ,  H01L2224/13 ,  H01L2224/48463 ,  H01L2224/73257 ,  H01L2924/1461 ,  H01L2924/00

    摘要： A component system includes at least one MEMS element, a cap for a micromechanical structure of the MEMS element, and at least one ASIC substrate. The micromechanical structure of the MEMS element is implemented in the functional layer of an SOI wafer. The MEMS element is mounted face down, with the structured functional layer on the ASIC substrate, and the cap is implemented in the substrate of the SOI wafer. The ASIC substrate includes a starting substrate provided with a layered structure on both sides. At least one circuit level is implemented in each case both in the MEMS-side layered structure and in the rear-side layered structure of the ASIC substrate. In the ASIC substrate, at least one ASIC through contact is implemented which electrically contacts at least one circuit level of the rear-side layered structure and/or at least one circuit level of the MEMS-side layered structure.

    摘要翻译： 组件系统包括至少一个MEMS元件，用于MEMS元件的微机械结构的盖以及至少一个ASIC基板。 MEMS元件的微机械结构在SOI晶片的功能层中实现。 MEMS元件面朝下安装，ASIC结构上的结构化功能层，并且帽被实现在SOI晶片的衬底中。 ASIC基板包括在两侧设置有分层结构的起始衬底。 在ASIC基板的MEMS侧分层结构和后侧层叠结构中，每种情况都至少实现一个电路电平。 在ASIC基板中，实现至少一个ASIC接触，其电接触后侧分层结构的至少一个电路电平和/或MEMS侧分层结构的至少一个电路电平。