公开(公告)号：US20090272321A1

公开(公告)日：2009-11-05

申请号：US12502331

申请日：2009-07-14

申请人： Fuminori TATEISHI ,  Hideaki KUWABARA

发明人： Fuminori TATEISHI ,  Hideaki KUWABARA

IPC分类号： B05C11/00 ,  B05B7/00

CPC分类号： H01L21/76838 ,  B41J3/407 ,  B41J11/002 ,  H01L21/2885 ,  H01L21/6715 ,  H01L27/1285 ,  H01L27/1292

摘要： The present invention provides a manufacturing apparatus of a semiconductor device, having a pattern-forming apparatus using a droplet-discharging method that is suitable for a large substrate in mass production. A plurality of pattern-forming apparatuses using a droplet-discharging method and a plurality of heat-treatment chambers are provided, and each of which is connected to one transfer chamber, which is a multi-chamber system. Discharging and baking are conducted efficiently to improve productivity. A gas is blown in the same direction as the scanning direction (or a scanning direction of a discharging head) on a substrate just after a droplet is landed, by providing a blowing means in the pattern-forming apparatus, and a heater is provided in a gas-flow path for local baking.

摘要翻译： 本发明提供了一种半导体装置的制造装置，其具有使用适合大批量生产的大基板的液滴喷射法的图案形成装置。 提供了使用液滴喷射法的多个图案形成装置和多个热处理室，并且每个图案形成装置连接到作为多室系统的一个传送室。 有效地进行放电和烘烤以提高生产率。 通过在图案形成装置中设置吹风装置，在与液滴着落之后的基板上沿与扫描方向（或排出头的扫描方向）相同的方向吹入气体，并且将加热器设置在 用于局部烘烤的气体流路。

公开(公告)号：US20120298990A1

公开(公告)日：2012-11-29

申请号：US13567451

申请日：2012-08-06

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Hiroyuki MIYAKE ,  Hideaki KUWABARA ,  Ikuko KAWAMATA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Hiroyuki MIYAKE ,  Hideaki KUWABARA ,  Ikuko KAWAMATA

IPC分类号： H01L29/12

CPC分类号： H01L27/1251 ,  G02F1/13454 ,  G02F2201/40 ,  G02F2202/10 ,  H01L27/1225 ,  H01L27/1233

摘要： An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.

摘要翻译： 目的是提高半导体器件的开口率。 半导体器件包括驱动器电路部分和在一个衬底上的显示部分（也称为像素部分）。 驱动器电路部分包括用于驱动电路的沟道蚀刻薄膜晶体管，其中使用金属形成源电极和漏电极，并且沟道层由氧化物半导体形成，并且使用金属形成驱动电路布线。 显示部分包括用于像素的沟道保护薄膜晶体管，其中使用氧化物导体形成源极电极层和漏极电极层，并且半导体层由氧化物半导体形成;以及显示部分布线，其使用 氧化物导体。

公开(公告)号：US20120286315A1

公开(公告)日：2012-11-15

申请号：US13558374

申请日：2012-07-26

申请人： Toru TAKAYAMA ,  Junya MARUYAMA ,  Yumiko OHNO ,  Masakazu MURAKAMI ,  Toshiji HAMATANI ,  Hideaki KUWABARA ,  Shunpei YAMAZAKI

发明人： Toru TAKAYAMA ,  Junya MARUYAMA ,  Yumiko OHNO ,  Masakazu MURAKAMI ,  Toshiji HAMATANI ,  Hideaki KUWABARA ,  Shunpei YAMAZAKI

IPC分类号： H01L27/32

CPC分类号： H01L27/3276 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/14634 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/3272 ,  H01L29/66757 ,  H01L29/78603 ,  H01L31/105 ,  H01L51/0024 ,  H01L51/003 ,  H01L51/5212 ,  H01L51/5253 ,  H01L2221/68368

摘要： (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials.(MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.

摘要翻译： （目的）本发明的目的是提供一种减轻半导体器件及其制造方法，该方法是将待剥离的层粘贴到各种基材上。 （解决问题的手段）在本发明中，在基板上形成被剥离层，然后将具有蚀刻阻挡膜的密封基板上的粘合材料粘贴在被剥离层上，然后仅除去 密封衬底通过蚀刻或抛光。 剩余的蚀刻阻挡膜用作阻挡膜。 此外，可以将磁片作为粘贴部件粘贴。

公开(公告)号：US20110012105A1

公开(公告)日：2011-01-20

申请号：US12835117

申请日：2010-07-13

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Hiroyuki MIYAKE ,  Hideaki KUWABARA ,  Ikuko KAWAMATA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Hiroyuki MIYAKE ,  Hideaki KUWABARA ,  Ikuko KAWAMATA

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1251 ,  G02F1/13454 ,  G02F2201/40 ,  G02F2202/10 ,  H01L27/1225 ,  H01L27/1233

摘要： An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.

摘要翻译： 目的是提高半导体器件的开口率。 半导体器件包括驱动器电路部分和在一个衬底上的显示部分（也称为像素部分）。 驱动器电路部分包括用于驱动电路的沟道蚀刻薄膜晶体管，其中使用金属形成源电极和漏电极，并且沟道层由氧化物半导体形成，以及使用金属形成的驱动电路布线。 显示部分包括用于像素的沟道保护薄膜晶体管，其中使用氧化物导体形成源极电极层和漏极电极层，并且半导体层由氧化物半导体形成;以及显示部分布线，其使用 氧化物导体。

公开(公告)号：US20100195033A1

公开(公告)日：2010-08-05

申请号：US12759999

申请日：2010-04-14

申请人： Toru TAKAYAMA ,  Junya MARUYAMA ,  Yumiko OHNO ,  Masakazu MURAKAMI ,  Toshiji HAMATANI ,  Hideaki KUWABARA ,  Shunpei YAMAZAKI

发明人： Toru TAKAYAMA ,  Junya MARUYAMA ,  Yumiko OHNO ,  Masakazu MURAKAMI ,  Toshiji HAMATANI ,  Hideaki KUWABARA ,  Shunpei YAMAZAKI

IPC分类号： G02F1/1333

CPC分类号： H01L27/3276 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/14634 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/3272 ,  H01L29/66757 ,  H01L29/78603 ,  H01L31/105 ,  H01L51/0024 ,  H01L51/003 ,  H01L51/5212 ,  H01L51/5253 ,  H01L2221/68368

摘要： (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials.(MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.

摘要翻译： （目的）本发明的目的是提供一种减轻半导体器件及其制造方法，该方法是将待剥离的层粘贴到各种基材上。 （解决问题的手段）在本发明中，在基板上形成被剥离层，然后将具有蚀刻阻挡膜的密封基板上的粘合材料粘贴在被剥离层上，然后仅除去 密封衬底通过蚀刻或抛光。 剩余的蚀刻阻挡膜用作阻挡膜。 此外，可以将磁片作为粘贴部件粘贴。

公开(公告)号：US20100171117A1

公开(公告)日：2010-07-08

申请号：US12729298

申请日：2010-03-23

申请人： Hideaki KUWABARA ,  Hiroko YAMAMOTO

发明人： Hideaki KUWABARA ,  Hiroko YAMAMOTO

IPC分类号： H01L29/786 ,  H01L29/22

CPC分类号： H01L23/5226 ,  G02F1/136227 ,  H01L21/288 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76838 ,  H01L21/76877 ,  H01L23/49855 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/41733 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： It is an object of the present invention to simplify steps needed to process a wiring in forming a multilayer wiring. In addition, when a droplet discharging technique or a nanoimprint technique is used to form a wiring in a contact hole having a comparatively long diameter, the wiring in accordance with the shape of the contact hole is formed, and the wiring portion of the contact hole is likely to have a depression compared with other portions. A penetrating opening is formed by irradiating a light-transmitting insulating film with laser light having high intensity and a pulse high in repetition frequency. A plurality of openings having a minute contact area is provided instead of forming one penetrating opening having a large contact area to have an even thickness of a wiring by reducing a partial depression and also to ensure contact resistance.

摘要翻译： 本发明的目的是简化在形成多层布线时处理布线所需的步骤。 此外，当使用液滴喷射技术或纳米压印技术在具有较长直径的接触孔中形成布线时，形成根据接触孔的形状的布线，并且接触孔的布线部分 与其他部分相比可能会有抑郁症。 通过用具有高强度的激光和重复频率高的脉冲照射透光绝缘膜来形成穿透开口。 提供具有微小接触面积的多个开口，而不是通过减小部分凹陷而形成具有大接触面积的一个穿透开口以具有均匀的布线厚度，并且还确保接触电阻。

公开(公告)号：US20090279012A1

公开(公告)日：2009-11-12

申请号：US12504840

申请日：2009-07-17

申请人： Hideaki KUWABARA ,  Shunpei YAMAZAKI ,  Shinji MAEKAWA ,  Osamu NAKAMURA

发明人： Hideaki KUWABARA ,  Shunpei YAMAZAKI ,  Shinji MAEKAWA ,  Osamu NAKAMURA

IPC分类号： G02F1/136 ,  H01L27/12

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate.In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在制作显示大面积的显示器时，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅极电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US20090152541A1

公开(公告)日：2009-06-18

申请号：US12346250

申请日：2008-12-30

申请人： Shinji MAEKAWA ,  Hideaki KUWABARA

发明人： Shinji MAEKAWA ,  Hideaki KUWABARA

IPC分类号： H01L29/786 ,  H01L27/088

CPC分类号： H01L29/78678 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/7869

摘要： The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.

摘要翻译： 本发明提供一种使用适合于批量生产大型基板的液滴喷射方法的制造方法。 导电膜的感光材料溶液通过液滴喷射法选择性地放电，选择性地暴露于激光并显影或蚀刻，从而仅允许暴露于激光的区域实现源极布线和漏极布线 具有比通过放电形成的图案本身更微细的图案。 源极布线和漏极布线的一个特征是源极布线和漏极布线与岛状半导体层交叉并重叠。

公开(公告)号：US20120007159A1

公开(公告)日：2012-01-12

申请号：US13234639

申请日：2011-09-16

申请人： Shunpei YAMAZAKI ,  Toru TAKAYAMA ,  Junya MARUYAMA ,  Yumiko OHNO ,  Yuugo GOTO ,  Hideaki KUWABARA

发明人： Shunpei YAMAZAKI ,  Toru TAKAYAMA ,  Junya MARUYAMA ,  Yumiko OHNO ,  Yuugo GOTO ,  Hideaki KUWABARA

IPC分类号： H01L27/06

CPC分类号： H01L21/6835 ,  H01L23/5385 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L27/0688 ,  H01L27/12 ,  H01L29/66757 ,  H01L2221/68354 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01056 ,  H01L2924/0106 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12034 ,  H01L2924/12042 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3011 ,  H03H3/08 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an inductor, a capacitor, a resistor element, a TFT element, an embedded wiring and the like, is formed over a substrate, separated from the substrate, and transferred onto a circuit board 100. An electrical conduction with a wiring pattern 114 provided in the circuit board 100 is made by a wire 112 or a solder 107, thereby forming a high frequency module or the like.

摘要翻译： 本发明的目的是提供一种在不使用半导体衬底的情况下集成各种元件的半导体器件及其制造方法。 根据本发明，在与衬底分离的衬底上形成包括电感器，电容器，电阻元件，TFT元件，嵌入布线等的待分离层，并转移到电路板 通过线112或焊料107与设置在电路板100中的布线图案114进行导电，从而形成高频模块等。

公开(公告)号：US20110024751A1

公开(公告)日：2011-02-03

申请号：US12846556

申请日：2010-07-29

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Hideaki KUWABARA

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Hideaki KUWABARA

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L33/0041 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.

摘要翻译： 在使用第一氧化物半导体层和第二氧化物半导体层的堆叠的底栅极薄膜晶体管中，形成作为沟道保护层的氧化物绝缘层，与氧化物半导体层的与 栅电极层。 在与绝缘层的形成相同的步骤中，形成覆盖氧化物半导体层的叠层的周边部分（包括侧面）的氧化物绝缘层。