公开(公告)号：US20170365775A1

公开(公告)日：2017-12-21

申请号：US15690828

申请日：2017-08-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/293 ,  H01L41/25 ,  G06F17/50 ,  H01L21/768 ,  H01L23/00 ,  H01L41/08 ,  H03H9/64 ,  H01L23/48 ,  H01L27/06 ,  H01L25/16 ,  H01L23/66 ,  H01L49/02

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

公开(公告)号：US20170186643A1

公开(公告)日：2017-06-29

申请号：US14982576

申请日：2015-12-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Anthony K. Stamper ,  Mukta G. Farooq ,  John A. Fitzsimmons ,  Mark D. Jaffe ,  Randy L. Wolf

IPC: H01L21/762 ,  H01L27/13

CPC classification number: H01L21/76256 ,  H01L21/6835 ,  H01L21/7624 ,  H01L27/13 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381

Abstract: Assemblies including a device layer of a silicon-on-insulator (SOI) substrate and a replacement substrate replacing a handle wafer of the SOI substrate, and methods for transferring the device layer of the SOI substrate from the handle wafer to the replacement substrate. A device structure is formed in a first section of the handle wafer, and a second section of the handle wafer adjoining the first section of the handle wafer is removed to expose a surface of the buried dielectric layer of the silicon-on-insulator substrate. A permanent substrate is attached to the surface of the buried dielectric layer. When the permanent substrate is attached to the surface of the buried dielectric layer, the section of the handle wafer is received inside a cavity defined in the permanent substrate.

公开(公告)号：US20170330832A1

公开(公告)日：2017-11-16

申请号：US15152794

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L23/522 ,  H01L23/66 ,  H01L23/528 ,  H01L27/12

CPC classification number: H01L23/5222 ,  H01L21/7682 ,  H01L23/4821 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L27/1203

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US09916415B2

公开(公告)日：2018-03-13

申请号：US15095239

申请日：2016-04-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Frederick G. Anderson ,  Michael L. Gautsch ,  Jean-Marc Petillat ,  Philippe Ramos ,  Randy L. Wolf ,  Jiansheng Xu

IPC: G06F17/50 ,  H01L27/12

CPC classification number: G06F17/5081 ,  G06F17/5009 ,  G06F17/5036 ,  G06F2217/12 ,  G06F2217/84 ,  H01L27/1211

Abstract: Disclosed are embodiments for modeling integrated circuit (IC) performance. In these embodiments, a parasitic extraction process is performed to generate a netlist that, not only accounts for various parasitics within the IC, but also accounts for substrate-generated signal distortions (e.g., substrate-generated harmonic signal distortions) that occur within the IC. During this netlist extraction process, the design layout of the IC is analyzed to identify parasitics that are to be represented in the netlist and to also identify any circuit elements with output signals that are subject to substrate-generated signal distortions. When such circuit elements are identified, signal distortion models, which were previously empirically determined and stored in a model library, which correspond to the identified circuit elements, and which account for the signal distortions, are selected from the model library and incorporated into the netlist. Simulations are subsequently performed using this netlist to generate a performance model for the IC.

公开(公告)号：US20170330790A1

公开(公告)日：2017-11-16

申请号：US15152797

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L21/768 ,  H01L21/84 ,  H01L21/3213 ,  H01L21/311 ,  H01L23/66 ,  H01L21/02

CPC classification number: H01L21/7682 ,  H01L21/02271 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76805 ,  H01L21/76829 ,  H01L21/76895 ,  H01L21/84 ,  H01L23/66 ,  H01L27/1248 ,  H01L29/78654

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US09818637B2

公开(公告)日：2017-11-14

申请号：US14982576

申请日：2015-12-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Anthony K. Stamper ,  Mukta G. Farooq ,  John A. Fitzsimmons ,  Mark D. Jaffe ,  Randy L. Wolf

IPC: H01L21/762 ,  H01L27/13

CPC classification number: H01L21/76256 ,  H01L21/6835 ,  H01L21/7624 ,  H01L27/13 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381

Abstract: Assemblies including a device layer of a silicon-on-insulator (SOI) substrate and a replacement substrate replacing a handle wafer of the SOI substrate, and methods for transferring the device layer of the SOI substrate from the handle wafer to the replacement substrate. A device structure is formed in a first section of the handle wafer, and a second section of the handle wafer adjoining the first section of the handle wafer is removed to expose a surface of the buried dielectric layer of the silicon-on-insulator substrate. A permanent substrate is attached to the surface of the buried dielectric layer. When the permanent substrate is attached to the surface of the buried dielectric layer, the section of the handle wafer is received inside a cavity defined in the permanent substrate.

公开(公告)号：US10559743B2

公开(公告)日：2020-02-11

申请号：US15690828

申请日：2017-08-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/293 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H03H9/64 ,  G06F17/50 ,  H01L41/08 ,  H01L41/25 ,  H01L23/66 ,  H01L25/16 ,  H01L27/06 ,  H01L49/02

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

公开(公告)号：US10211146B2

公开(公告)日：2019-02-19

申请号：US15152794

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L23/522 ,  H01L27/12 ,  H01L23/482 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US10037911B2

公开(公告)日：2018-07-31

申请号：US15692666

申请日：2017-08-31

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Anthony K. Stamper ,  Mukta G. Farooq ,  John A. Fitzsimmons ,  Mark D. Jaffe ,  Randy L. Wolf

IPC: H01L21/762 ,  H01L27/13

Abstract: Assemblies including a device layer of a silicon-on-insulator (SOI) substrate and a replacement substrate replacing a handle wafer of the SOI substrate, and methods for transferring the device layer of the SOI substrate from the handle wafer to the replacement substrate. A device structure is formed in a first section of the handle wafer, and a second section of the handle wafer adjoining the first section of the handle wafer is removed to expose a surface of the buried dielectric layer of the silicon-on-insulator substrate. A permanent substrate is attached to the surface of the buried dielectric layer. When the permanent substrate is attached to the surface of the buried dielectric layer, the section of the handle wafer is received inside a cavity defined in the permanent substrate.

公开(公告)号：US20180005873A1

公开(公告)日：2018-01-04

申请号：US15692666

申请日：2017-08-31

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Anthony K. Stamper ,  Mukta G. Farooq ,  John A. Fitzsimmons ,  Mark D. Jaffe ,  Randy L. Wolf

IPC: H01L21/762 ,  H01L27/13

CPC classification number: H01L21/76256 ,  H01L21/6835 ,  H01L21/7624 ,  H01L27/13 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381

Abstract: Assemblies including a device layer of a silicon-on-insulator (SOI) substrate and a replacement substrate replacing a handle wafer of the SOI substrate, and methods for transferring the device layer of the SOI substrate from the handle wafer to the replacement substrate. A device structure is formed in a first section of the handle wafer, and a second section of the handle wafer adjoining the first section of the handle wafer is removed to expose a surface of the buried dielectric layer of the silicon-on-insulator substrate. A permanent substrate is attached to the surface of the buried dielectric layer. When the permanent substrate is attached to the surface of the buried dielectric layer, the section of the handle wafer is received inside a cavity defined in the permanent substrate.