公开(公告)号：US10211103B1

公开(公告)日：2019-02-19

申请号：US15787257

申请日：2017-10-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Haigou Huang ,  Dinesh Koli ,  Yuan Zhou ,  Xingzhao Shi ,  Chih-Chiang Chang ,  Tai Fong Chao

IPC: H01L21/28 ,  H01L21/768 ,  H01L29/66 ,  H01L23/522 ,  H01L23/532

Abstract: Methods of forming a SAC cap with SiN U-shaped and oxide T-shaped structures and the resulting devices are provided. Embodiments include forming a substrate with a trench and a plurality of gate structures; forming a nitride liner over portions of the substrate and along sidewalls of each gate structure; forming an ILD between each gate structure and in the trench; recessing each gate structure between the ILD; forming a U-shaped nitride liner over each recessed gate structure; forming an a-Si layer over the nitride liner and the U-shaped nitride liner; removing portions of the nitride liner, the U-shaped nitride liner and the a-Si layer; forming a W layer over portions of the substrate adjacent to and between the a-Si layer; forming an oxide liner over the nitride liner, the U-shaped nitride liner and along sidewalls of the W layer; and forming an oxide layer over portions of the oxide liner.

公开(公告)号：US10256089B2

公开(公告)日：2019-04-09

申请号：US15626732

申请日：2017-06-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huy Cao ,  Haigou Huang ,  Jinsheng Gao ,  Tai Fong Chao

IPC: H01L29/417 ,  H01L21/02 ,  H01L21/768 ,  H01L21/28

Abstract: Interconnect structures and methods of forming an interconnect structure. A sacrificial contact is arranged between a first gate structure and a second gate structure. The sacrificial contact extends vertically to a source/drain region. A section of the sacrificial contact is removed to form a cut opening extending vertically to the source/drain region. A first dielectric layer is deposited in the cut opening, and is then partially removed to open a space in the cut opening that is arranged vertically above the first dielectric layer. A second dielectric layer is deposited that fills the space in the cut opening and forms a cap on the first dielectric layer. The first dielectric layer has a first dielectric constant, and the second dielectric layer has a second dielectric constant that is greater than the first dielectric constant.

公开(公告)号：US20180366324A1

公开(公告)日：2018-12-20

申请号：US15626732

申请日：2017-06-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huy Cao ,  Haigou Huang ,  Jinsheng Gao ,  Tai Fong Chao

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/28

CPC classification number: H01L21/02378 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/28255 ,  H01L21/76832 ,  H01L21/76837 ,  H01L21/76888 ,  H01L29/41775

Abstract: Interconnect structures and methods of forming an interconnect structure. A sacrificial contact is arranged between a first gate structure and a second gate structure. The sacrificial contact extends vertically to a source/drain region. A section of the sacrificial contact is removed to form a cut opening extending vertically to the source/drain region. A first dielectric layer is deposited in the cut opening, and is then partially removed to open a space in the cut opening that is arranged vertically above the first dielectric layer. A second dielectric layer is deposited that fills the space in the cut opening and forms a cap on the first dielectric layer. The first dielectric layer has a first dielectric constant, and the second dielectric layer has a second dielectric constant that is greater than the first dielectric constant.

公开(公告)号：US09966272B1

公开(公告)日：2018-05-08

申请号：US15632931

申请日：2017-06-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Haifeng Sheng ,  Haigou Huang ,  Tai Fong Chao ,  Jiehui Shu ,  Jinping Liu ,  Xingzhao Shi ,  Laertis Economikos

IPC: H01L21/00 ,  H01L21/3105

CPC classification number: H01L21/31056 ,  H01L21/31055 ,  H01L21/762 ,  H01L21/823878

Abstract: The disclosure is directed to methods of planarizing an integrated circuit structure including: forming a dielectric over a first nitride layer; planarizing the dielectric to a top surface of a set of nitride fins in a first region and removing the dielectric from a second region to expose the substantially planar upper surface in a second region; forming a second nitride layer over the dielectric and the top surface of the set of nitride fins and over the substantially planar upper surface; planarizing the second nitride layer such that the second nitride layer in the second region is planar with the top surface of the dielectric and the set of nitride fins, and such that the second nitride layer is removed from the first region; and performing an etch such that the first nitride layer in the first region is planar with the first nitride layer in the second region.

公开(公告)号：US09865543B1

公开(公告)日：2018-01-09

申请号：US15416152

申请日：2017-01-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Qiang Fang ,  Haigou Huang ,  Stan Tsai ,  John H. Zhang ,  Xingzhao Shi ,  Tai Fong Chao

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/82 ,  H01L23/528 ,  H01L21/321 ,  H01L21/8238 ,  H01L21/8234

CPC classification number: H01L23/5283 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/53209

Abstract: A process for forming a conductive structure includes the formation of a self-aligned, inlaid conductive cap over a cobalt-based contact. The inlaid conductive cap is formed using a damascene process by depositing a conductive layer comprising tungsten or copper over a recessed cobalt-based contact, followed by a CMP step to remove excess portions of the conductive layer. The conductive cap can cooperate with a liner/barrier layer to form an effective barrier to cobalt migration and oxidation.