摘要:
Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor. The exit logic is to transfer control to a host if the delivery logic determines that the interrupt request is not to be delivered to the virtual processor.
摘要:
Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor. The exit logic is to transfer control to a host if the delivery logic determines that the interrupt request is not to be delivered to the virtual processor.
摘要:
Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor. The exit logic is to transfer control to a host if the delivery logic determines that the interrupt request is not to be delivered to the virtual processor.
摘要:
Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to the device and based on an access type, whether the access is allowed. The exit logic is to transfer control to a host if the evaluation logic determines that the access is not allowed.
摘要:
A system and method for allowing a virtual machine monitor to assume control of a system when the current privilege level of guest software meets a privilege level exiting criteria. The processor detects that the current privilege level meets the criteria and then transfers control from the guest software to the virtual machine monitor. The virtual machine monitor may decline to assume control for certain privilege level changes or values.
摘要:
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
摘要:
In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator is set to an enabling value, and identifying a VMM timer value configured by the VMM. The method further includes periodically comparing a current value of a timing source with the VMM timer value, generating an internal event if the current value of the timing source has reached the VMM timer value, and transitioning control to the VMM in response to the internal event without incurring an event handling procedure in any one of the VMM and the VM.
摘要:
Methods and systems are provided to control transitions between a virtual machine (VM) and Virtual Machine Monitor (VMM). A processor uses state action indicators to load and/or store associated elements of machine state before completing the transition. The state action indicators may be stored in a Virtual Machine Control Structure (VMCS), predetermined, and/or calculated dynamically. In some embodiments, the values loaded can be directly acquired from the VMCS, predetermined and/or calculated dynamically. In some embodiments, the values stored may be acquired directly from machine state, predetermined and/or calculated dynamically.
摘要:
Embodiments of apparatuses, methods, and systems for virtualizing performance counters are disclosed. In one embodiment, an apparatus includes a counter, a counter enable storage location, counter enable logic, and virtual machine control logic. The counter enable storage location is to store a counter enable indicator. The counter enable logic is to enable the counter based on the counter enable indicator. The virtual machine control logic is to transfer control of the apparatus to a guest. The virtual machine control logic includes guest state load logic to cause a guest value from a virtual machine control structure to be loaded into the counter enable storage location in connection with a transfer of control of the apparatus to the guest.
摘要:
Embodiments of apparatuses, methods, and systems for virtualizing performance counters are disclosed. In one embodiment, an apparatus includes a counter, a counter enable storage location, counter enable logic, and virtual machine control logic. The counter enable storage location is store a counter enable indicator. The counter enable logic is to enable the counter, based on the counter enable indicator. The virtual machine control logic is to transfer control of the apparatus to a guest. The virtual machine control logic includes guest state load logic to cause a guest value from a virtual machine control structure to be loaded into the counter enable storage location in connection with a transfer of control of the apparatus to a guest.